mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-12-21 09:12:01 +00:00
7b35ebc64a
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2
9 lines
No EOL
192 B
C#
9 lines
No EOL
192 B
C#
namespace Ryujinx.Tests.Cpu
|
|
{
|
|
public class PrecomputedThumbTestCase
|
|
{
|
|
public ushort[] Instructions;
|
|
public uint[] StartRegs;
|
|
public uint[] FinalRegs;
|
|
}
|
|
} |