mirrors/Ryujinx
1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-21 00:42:01 +00:00
Code Issues Releases Activity
Ryujinx/ARMeilleure/Instructions
History
riperiperi 9ef94c8292
ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 
* ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext

Some games access these system registers several tens of thousands of times in a second from many different threads. While this isn't really crippling, it is a lot of wasted time spent in a reverse pinvoke transition.

Example games are Pokemon Scarlet/Violet and BOTW. These games have a lot of different potential bottlenecks so it's unlikely you will see a consistent improvement, but it definitely disappears from the cpu profile.

* Remove unreachable code.

* Add ulong conversion for offsets

* Nit
2023-04-11 08:55:04 +02:00
..
CryptoHelper.cs Use ReadOnlySpan<byte> compiler optimization for static data (#3130) 2022-02-17 21:38:50 +01:00
InstEmitAlu.cs
InstEmitAlu32.cs Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693) 2022-09-13 19:51:40 -03:00
InstEmitAluHelper.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs Decoder: Exit on trapping instructions, and resume execution at trapping instruction (#3153) 2022-03-04 23:16:58 +01:00
InstEmitException32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitFlow.cs
InstEmitFlow32.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitFlowHelper.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitHash.cs
InstEmitHash32.cs Minor code formatting (#4498) 2023-03-04 14:43:08 +01:00
InstEmitHashHelper.cs Minor code formatting (#4498) 2023-03-04 14:43:08 +01:00
InstEmitHelper.cs T32: Implement B, B.cond, BL, BLX (#3155) 2022-03-04 23:05:08 +01:00
InstEmitMemory.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitMemory32.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMemoryEx.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
InstEmitMemoryEx32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitSimdArithmetic.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
InstEmitSimdArithmetic32.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdCmp.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdCmp32.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdCvt32.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
InstEmitSimdHash.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHash32.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHashHelper.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHelper.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
InstEmitSimdHelper32.cs ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618) 2023-04-10 12:22:58 +02:00
InstEmitSimdHelper32Arm64.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdHelperArm64.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdLogical.cs ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147) 2023-03-20 16:09:24 -03:00
InstEmitSimdLogical32.cs ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147) 2023-03-20 16:09:24 -03:00
InstEmitSimdMemory.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMemory32.cs Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695) 2022-09-13 08:24:09 +02:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147) 2023-03-20 16:09:24 -03:00
InstEmitSimdShift.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
InstEmitSimdShift32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSystem.cs ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 2023-04-11 08:55:04 +02:00
InstEmitSystem32.cs ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 2023-04-11 08:55:04 +02:00
InstName.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
NativeInterface.cs ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) 2023-04-11 08:55:04 +02:00
SoftFallback.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
SoftFloat.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00