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7b35ebc64a
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2
20 lines
No EOL
675 B
C#
20 lines
No EOL
675 B
C#
namespace ARMeilleure.Decoders
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{
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class OpCodeT32AluRsImm : OpCodeT32Alu, IOpCode32AluRsImm
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{
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public int Rm { get; }
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public int Immediate { get; }
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public ShiftType ShiftType { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32AluRsImm(inst, address, opCode);
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public OpCodeT32AluRsImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rm = (opCode >> 0) & 0xf;
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Immediate = ((opCode >> 6) & 3) | ((opCode >> 10) & 0x1c);
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ShiftType = (ShiftType)((opCode >> 4) & 3);
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}
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}
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} |