1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-21 08:02:12 +00:00
Ryujinx/ARMeilleure/CodeGen/X86
gdkchan 5e0f8e8738
Implement JIT Arm64 backend (#4114)
* Implement JIT Arm64 backend

* PPTC version bump

* Address some feedback from Arm64 JIT PR

* Address even more PR feedback

* Remove unused IsPageAligned function

* Sync Qc flag before calls

* Fix comment and remove unused enum

* Address riperiperi PR feedback

* Delete Breakpoint IR instruction that was only implemented for Arm64
2023-01-10 19:16:59 -03:00
..
Assembler.cs Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (#4145) 2022-12-18 20:21:10 -03:00
AssemblerTable.cs Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (#4145) 2022-12-18 20:21:10 -03:00
CallConvName.cs
CallingConvention.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
CodeGenCommon.cs
CodeGenContext.cs Add Operand.Label support to Assembler (#2680) 2021-10-05 14:04:55 -03:00
CodeGenerator.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
HardwareCapabilities.cs Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (#4145) 2022-12-18 20:21:10 -03:00
IntrinsicInfo.cs Make structs readonly when applicable (#4002) 2022-12-05 14:47:39 +01:00
IntrinsicTable.cs Implement JIT Arm64 backend (#4114) 2023-01-10 19:16:59 -03:00
IntrinsicType.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
PreAllocator.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
X86Condition.cs Improve branch operations (#1442) 2020-08-05 08:52:33 +10:00
X86Instruction.cs Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (#4145) 2022-12-18 20:21:10 -03:00
X86Optimizer.cs Add a limit on the number of uses a constant may have (#3097) 2022-02-09 17:42:47 -03:00
X86Register.cs