1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-01 00:42:03 +00:00
Ryujinx/ARMeilleure/CodeGen/X86
Ficture Seven b3c051bbec
Use movd,movq for i32/64 VectorExtract %x, 0x0 (#1439)
* Use movd,movq for i32/64 VectorExtract %x, 0x0

* Increment PPTC interval version

* Use else-if instead

- Address gdkchan's feedback.
- Clean up Debug.Assert calls

* Inline `count` expression into Debug.Assert

Apparently the CoreCLR JIT will not eliminate this. :(
2020-07-30 15:52:26 +10:00
..
Assembler.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
CallConvName.cs
CallingConvention.cs
CodeGenCommon.cs Optimize x64 loads and stores using complex addressing modes (#972) 2020-03-10 09:29:34 +11:00
CodeGenContext.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
CodeGenerator.cs Use movd,movq for i32/64 VectorExtract %x, 0x0 (#1439) 2020-07-30 15:52:26 +10:00
HardwareCapabilities.cs Implement a new physical memory manager and replace DeviceMemory (#856) 2020-05-04 08:54:50 +10:00
IntrinsicInfo.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntrinsicTable.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
IntrinsicType.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
PreAllocator.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
X86Condition.cs
X86Instruction.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
X86Optimizer.cs Fix PPTC on Windows 7. (#1369) 2020-07-09 10:45:24 +10:00
X86Register.cs