..
CryptoHelper.cs
Use ReadOnlySpan<byte> compiler optimization for static data ( #3130 )
2022-02-17 21:38:50 +01:00
InstEmitAlu.cs
InstEmitAlu32.cs
Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 ( #3693 )
2022-09-13 19:51:40 -03:00
InstEmitAluHelper.cs
T32: Add Vfp instructions ( #3690 )
2022-09-10 23:03:14 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
Decoder: Exit on trapping instructions, and resume execution at trapping instruction ( #3153 )
2022-03-04 23:16:58 +01:00
InstEmitException32.cs
Removed unused usings. ( #3593 )
2022-08-18 18:04:54 +02:00
InstEmitFlow.cs
InstEmitFlow32.cs
T32: Add Vfp instructions ( #3690 )
2022-09-10 23:03:14 -03:00
InstEmitFlowHelper.cs
Fix return type mismatch on 32-bit titles ( #3000 )
2022-01-16 08:39:43 -03:00
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
T32: Implement B, B.cond, BL, BLX ( #3155 )
2022-03-04 23:05:08 +01:00
InstEmitMemory.cs
Fix return type mismatch on 32-bit titles ( #3000 )
2022-01-16 08:39:43 -03:00
InstEmitMemory32.cs
Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions ( #3683 )
2022-09-09 22:09:11 -03:00
InstEmitMemoryEx.cs
A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) ( #3694 )
2022-09-14 18:18:15 -03:00
InstEmitMemoryEx32.cs
Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions ( #3687 )
2022-09-10 22:51:00 -03:00
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs
Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions ( #3683 )
2022-09-09 22:09:11 -03:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs
Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions ( #3687 )
2022-09-10 22:51:00 -03:00
InstEmitSimdArithmetic.cs
A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… ( #3712 )
2022-10-19 00:21:33 +00:00
InstEmitSimdArithmetic32.cs
Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions ( #3677 )
2022-09-09 21:47:38 -03:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… ( #3712 )
2022-10-19 00:21:33 +00:00
InstEmitSimdCvt32.cs
Do not clear the rejit queue when overlaps count is equal to 0. ( #3721 )
2022-10-19 02:08:34 +00:00
InstEmitSimdHash.cs
ARMeilleure: Hardware accelerate SHA256 ( #3585 )
2022-08-25 10:12:13 +00:00
InstEmitSimdHash32.cs
ARMeilleure: Hardware accelerate SHA256 ( #3585 )
2022-08-25 10:12:13 +00:00
InstEmitSimdHashHelper.cs
ARMeilleure: Hardware accelerate SHA256 ( #3585 )
2022-08-25 10:12:13 +00:00
InstEmitSimdHelper.cs
A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… ( #3712 )
2022-10-19 00:21:33 +00:00
InstEmitSimdHelper32.cs
A32: Implement VCVTT, VCVTB ( #3710 )
2022-10-19 02:36:04 +02:00
InstEmitSimdLogical.cs
ARMeilleure: Add gfni
acceleration ( #3669 )
2022-10-02 11:17:19 +02:00
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs
Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 ( #3695 )
2022-09-13 08:24:09 +02:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
ARMeilleure: Add gfni
acceleration ( #3669 )
2022-10-02 11:17:19 +02:00
InstEmitSimdShift32.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
InstEmitSystem.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
InstEmitSystem32.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
InstName.cs
A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) ( #3694 )
2022-09-14 18:18:15 -03:00
NativeInterface.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
SoftFallback.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00
SoftFloat.cs
Fpsr and Fpcr freed. ( #3701 )
2022-09-20 18:55:13 -03:00