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Ryujinx/ChocolArm64
gdkchan a694420d11
Implement speculative translation on the CPU (#515)
* Implement speculative translation on the cpu, and change the way how branches to unknown or untranslated addresses works

* Port t0opt changes and other cleanups

* Change namespace from translation related classes to ChocolArm64.Translation, other minor tweaks

* Fix typo

* Translate higher quality code for indirect jumps aswell, and on some cases that were missed when lower quality (tier 0) code was available

* Remove debug print

* Remove direct argument passing optimization, and enable tail calls for BR instructions

* Call delegates directly with Callvirt rather than calling Execute, do not emit calls for tier 0 code

* Remove unused property

* Rename argument on ArmSubroutine delegate
2019-02-04 18:26:05 -03:00
..
Decoders Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
Events Optimized memory modified check (#538) 2018-12-11 23:48:54 -02:00
Exceptions Better process implementation (#491) 2018-11-28 20:18:09 -02:00
Instructions Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
Memory Optimized memory modified check (#538) 2018-12-11 23:48:54 -02:00
State Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
Translation Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
ChocolArm64.csproj Add linux-x64 to RID property to make tests works on linux (#205) 2018-06-30 12:43:04 -03:00
CpuThread.cs Implement speculative translation on the CPU (#515) 2019-02-04 18:26:05 -03:00
OpCodeTable.cs Implement some ARM32 memory instructions and CMP (#565) 2019-01-29 13:06:11 -03:00
Optimizations.cs Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat Impl. for Fcmeq/ge/gt/le/lt_S/V (Reg & Zero), Faddp_S/V, Fmaxp_V, Fminp_V Inst.; add Sse Opt. for Shll_V, S/Ushll_V Inst.; improve Sse Opt. for Xtn_V Inst.. Add Tests. (#543) 2018-12-26 15:11:36 -02:00