LDj3SNuD 4bd1ad16f9 Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)		2021-03-25 23:33:32 +01:00
..
CpuTest.cs	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)	2020-12-07 10:37:07 +01:00
CpuTest32.cs	shader cache: Fix Linux boot issues (#1709)	2020-11-17 22:40:19 +01:00
CpuTestAlu.cs
CpuTestAlu32.cs	Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)	2020-03-01 07:51:55 +11:00
CpuTestAluBinary.cs
CpuTestAluBinary32.cs
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRs32.cs
CpuTestAluRx.cs
CpuTestBf32.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs	Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)	2018-11-01 01:22:09 -03:00
CpuTestMisc.cs
CpuTestMisc32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs
CpuTestSimd.cs	CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)	2021-01-20 09:12:33 +11:00
CpuTestSimd32.cs	Implement VCNT instruction (#1963)	2021-02-22 16:26:13 +01:00
CpuTestSimdCrypto.cs
CpuTestSimdCrypto32.cs
CpuTestSimdCvt.cs
CpuTestSimdCvt32.cs	Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)	2020-12-17 20:43:41 +01:00
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs
CpuTestSimdMemory32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestSimdMov32.cs
CpuTestSimdReg.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
CpuTestSimdReg32.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
CpuTestSimdRegElem.cs	Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)	2021-03-25 23:33:32 +01:00
CpuTestSimdRegElem32.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs	CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492)	2020-08-31 20:48:21 -03:00
CpuTestSimdShImm32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestSimdTbl.cs
CpuTestSystem.cs