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Ryujinx/Ryujinx.Tests/Cpu
gdkchan 89ccec197e
Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)
* Implement VMOVL and VORR.I32 AArch32 SIMD instructions

* Rename <dt> to <size> on test description

* Rename Widen to Long and improve VMOVL implementation a bit
2020-03-10 16:17:30 +11:00
..
CpuTest.cs
CpuTest32.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
CpuTestAlu.cs
CpuTestAlu32.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
CpuTestAluBinary.cs
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRs32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
CpuTestAluRx.cs
CpuTestBf32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
CpuTestSimd.cs
CpuTestSimdCrypto.cs
CpuTestSimdCvt.cs
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) 2020-03-10 16:17:30 +11:00
CpuTestSimdMemory32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
CpuTestSimdMov32.cs Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) 2020-03-10 16:17:30 +11:00
CpuTestSimdReg.cs Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956) 2020-03-01 07:51:17 +11:00
CpuTestSimdReg32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
CpuTestSimdRegElem.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs
CpuTestSimdShImm32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
CpuTestSimdTbl.cs
CpuTestSystem.cs