mirror of
https://github.com/Ryujinx/Ryujinx.git
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9cb57fb4bb
* Change naming convention for Ryujinx project * Change naming convention for ChocolArm64 project * Fix NaN * Remove unneeded this. from Ryujinx project * Adjust naming from new PRs * Name changes based on feedback * How did this get removed? * Rebasing fix * Change FP enum case * Remove prefix from ChocolArm64 classes - Part 1 * Remove prefix from ChocolArm64 classes - Part 2 * Fix alignment from last commit's renaming * Rename namespaces * Rename stragglers * Fix alignment * Rename OpCode class * Missed a few * Adjust alignment
188 lines
No EOL
5 KiB
C#
188 lines
No EOL
5 KiB
C#
using ChocolArm64.Decoders;
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using ChocolArm64.State;
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using System;
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using System.Collections.Generic;
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using System.Reflection.Emit;
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using System.Runtime.Intrinsics;
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namespace ChocolArm64.Translation
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{
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class ILEmitter
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{
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public LocalAlloc LocalAlloc { get; private set; }
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public ILGenerator Generator { get; private set; }
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private Dictionary<Register, int> _locals;
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private ILBlock[] _ilBlocks;
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private ILBlock _root;
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private TranslatedSub _subroutine;
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private string _subName;
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private int _localsCount;
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public ILEmitter(Block[] graph, Block root, string subName)
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{
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_subName = subName;
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_locals = new Dictionary<Register, int>();
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_ilBlocks = new ILBlock[graph.Length];
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ILBlock GetBlock(int index)
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{
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if (index < 0 || index >= _ilBlocks.Length)
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{
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return null;
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}
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if (_ilBlocks[index] == null)
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{
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_ilBlocks[index] = new ILBlock();
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}
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return _ilBlocks[index];
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}
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for (int index = 0; index < _ilBlocks.Length; index++)
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{
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ILBlock block = GetBlock(index);
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block.Next = GetBlock(Array.IndexOf(graph, graph[index].Next));
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block.Branch = GetBlock(Array.IndexOf(graph, graph[index].Branch));
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}
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_root = _ilBlocks[Array.IndexOf(graph, root)];
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}
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public ILBlock GetIlBlock(int index) => _ilBlocks[index];
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public TranslatedSub GetSubroutine()
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{
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LocalAlloc = new LocalAlloc(_ilBlocks, _root);
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InitSubroutine();
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InitLocals();
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foreach (ILBlock ilBlock in _ilBlocks)
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{
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ilBlock.Emit(this);
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}
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return _subroutine;
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}
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private void InitSubroutine()
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{
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List<Register> Params = new List<Register>();
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void SetParams(long inputs, RegisterType baseType)
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{
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for (int bit = 0; bit < 64; bit++)
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{
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long mask = 1L << bit;
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if ((inputs & mask) != 0)
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{
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Params.Add(GetRegFromBit(bit, baseType));
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}
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}
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}
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SetParams(LocalAlloc.GetIntInputs(_root), RegisterType.Int);
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SetParams(LocalAlloc.GetVecInputs(_root), RegisterType.Vector);
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DynamicMethod mthd = new DynamicMethod(_subName, typeof(long), GetParamTypes(Params));
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Generator = mthd.GetILGenerator();
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_subroutine = new TranslatedSub(mthd, Params);
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}
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private void InitLocals()
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{
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int paramsStart = TranslatedSub.FixedArgTypes.Length;
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_locals = new Dictionary<Register, int>();
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for (int index = 0; index < _subroutine.Params.Count; index++)
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{
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Register reg = _subroutine.Params[index];
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Generator.EmitLdarg(index + paramsStart);
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Generator.EmitStloc(GetLocalIndex(reg));
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}
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}
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private Type[] GetParamTypes(IList<Register> Params)
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{
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Type[] fixedArgs = TranslatedSub.FixedArgTypes;
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Type[] output = new Type[Params.Count + fixedArgs.Length];
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fixedArgs.CopyTo(output, 0);
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int typeIdx = fixedArgs.Length;
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for (int index = 0; index < Params.Count; index++)
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{
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output[typeIdx++] = GetFieldType(Params[index].Type);
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}
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return output;
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}
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public int GetLocalIndex(Register reg)
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{
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if (!_locals.TryGetValue(reg, out int index))
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{
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Generator.DeclareLocal(GetLocalType(reg));
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index = _localsCount++;
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_locals.Add(reg, index);
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}
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return index;
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}
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public Type GetLocalType(Register reg) => GetFieldType(reg.Type);
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public Type GetFieldType(RegisterType regType)
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{
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switch (regType)
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{
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case RegisterType.Flag: return typeof(bool);
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case RegisterType.Int: return typeof(ulong);
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case RegisterType.Vector: return typeof(Vector128<float>);
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}
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throw new ArgumentException(nameof(regType));
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}
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public static Register GetRegFromBit(int bit, RegisterType baseType)
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{
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if (bit < 32)
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{
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return new Register(bit, baseType);
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}
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else if (baseType == RegisterType.Int)
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{
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return new Register(bit & 0x1f, RegisterType.Flag);
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}
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else
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{
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throw new ArgumentOutOfRangeException(nameof(bit));
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}
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}
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public static bool IsRegIndex(int index)
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{
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return index >= 0 && index < 32;
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}
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}
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} |