mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-30 16:42:08 +00:00
a0c78f7920
* Update AOpCodeTable.cs * Update AInstEmitSimdShift.cs * Update ASoftFallback.cs * Update AOpCodeSimdShImm.cs * Update ABitUtils.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Create CpuTestSimdShImm.cs * Create CpuTestSimdRegElem.cs * Address PR feedback. * Nit. * Nit.
1500 lines
43 KiB
C#
1500 lines
43 KiB
C#
using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection;
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using System.Reflection.Emit;
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using System.Runtime.Intrinsics.X86;
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using static ChocolArm64.Instruction.AInstEmitSimdHelper;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Abs_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpSx(Context, () => EmitAbs(Context));
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}
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public static void Abs_V(AILEmitterCtx Context)
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{
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EmitVectorUnaryOpSx(Context, () => EmitAbs(Context));
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}
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public static void Add_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Add_V(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse2)
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{
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EmitSse2Call(Context, nameof(Sse2.Add));
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}
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else
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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}
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public static void Addhn_V(AILEmitterCtx Context)
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{
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EmitHighNarrow(Context, () => Context.Emit(OpCodes.Add), Round: false);
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}
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public static void Addp_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
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EmitVectorExtractZx(Context, Op.Rn, 1, Op.Size);
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Context.Emit(OpCodes.Add);
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EmitScalarSet(Context, Op.Rd, Op.Size);
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}
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public static void Addp_V(AILEmitterCtx Context)
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{
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EmitVectorPairwiseOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Addv_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Bytes = Op.GetBitsCount() >> 3;
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int Elems = Bytes >> Op.Size;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
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for (int Index = 1; Index < Elems; Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
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Context.Emit(OpCodes.Add);
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}
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EmitScalarSet(Context, Op.Rd, Op.Size);
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}
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public static void Cls_V(AILEmitterCtx Context)
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{
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MethodInfo MthdInfo = typeof(ASoftFallback).GetMethod(nameof(ASoftFallback.CountLeadingSigns));
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EmitCountLeadingBits(Context, () => Context.EmitCall(MthdInfo));
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}
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public static void Clz_V(AILEmitterCtx Context)
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{
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MethodInfo MthdInfo = typeof(ASoftFallback).GetMethod(nameof(ASoftFallback.CountLeadingZeros));
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EmitCountLeadingBits(Context, () => Context.EmitCall(MthdInfo));
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}
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private static void EmitCountLeadingBits(AILEmitterCtx Context, Action Emit)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Bytes = Op.GetBitsCount() >> 3;
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int Elems = Bytes >> Op.Size;
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int ESize = 8 << Op.Size;
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
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Context.EmitLdc_I4(ESize);
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Emit();
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EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Cnt_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Elems = Op.RegisterSize == ARegisterSize.SIMD128 ? 16 : 8;
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, 0);
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Context.Emit(OpCodes.Conv_U4);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountSetBits8));
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Context.Emit(OpCodes.Conv_U8);
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EmitVectorInsert(Context, Op.Rd, Index, 0);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitAbs(AILEmitterCtx Context)
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{
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AILLabel LblTrue = new AILLabel();
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Context.Emit(OpCodes.Dup);
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Context.Emit(OpCodes.Ldc_I4_0);
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Context.Emit(OpCodes.Bge_S, LblTrue);
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Context.Emit(OpCodes.Neg);
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Context.MarkLabel(LblTrue);
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}
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private static void EmitAddLongPairwise(AILEmitterCtx Context, bool Signed, bool Accumulate)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Words = Op.GetBitsCount() >> 4;
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int Pairs = Words >> Op.Size;
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for (int Index = 0; Index < Pairs; Index++)
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{
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int Idx = Index << 1;
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EmitVectorExtract(Context, Op.Rn, Idx, Op.Size, Signed);
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EmitVectorExtract(Context, Op.Rn, Idx + 1, Op.Size, Signed);
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Context.Emit(OpCodes.Add);
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if (Accumulate)
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{
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EmitVectorExtract(Context, Op.Rd, Index, Op.Size + 1, Signed);
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Context.Emit(OpCodes.Add);
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}
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EmitVectorInsertTmp(Context, Index, Op.Size + 1);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitDoublingMultiplyHighHalf(AILEmitterCtx Context, bool Round)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int ESize = 8 << Op.Size;
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Context.Emit(OpCodes.Mul);
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if (!Round)
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{
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Context.EmitAsr(ESize - 1);
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}
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else
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{
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long RoundConst = 1L << (ESize - 1);
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AILLabel LblTrue = new AILLabel();
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Context.EmitLsl(1);
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Context.EmitLdc_I8(RoundConst);
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Context.Emit(OpCodes.Add);
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Context.EmitAsr(ESize);
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Context.Emit(OpCodes.Dup);
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Context.EmitLdc_I8((long)int.MinValue);
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Context.Emit(OpCodes.Bne_Un_S, LblTrue);
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Context.Emit(OpCodes.Neg);
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Context.MarkLabel(LblTrue);
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}
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}
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private static void EmitHighNarrow(AILEmitterCtx Context, Action Emit, bool Round)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int Elems = 8 >> Op.Size;
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int ESize = 8 << Op.Size;
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int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
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long RoundConst = 1L << (ESize - 1);
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if (Part != 0)
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{
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Context.EmitLdvec(Op.Rd);
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Context.EmitStvectmp();
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}
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size + 1);
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EmitVectorExtractZx(Context, Op.Rm, Index, Op.Size + 1);
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Emit();
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if (Round)
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{
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Context.EmitLdc_I8(RoundConst);
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Context.Emit(OpCodes.Add);
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}
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Context.EmitLsr(ESize);
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EmitVectorInsertTmp(Context, Part + Index, Op.Size);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if (Part == 0)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Fabd_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Sub);
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EmitUnaryMathCall(Context, nameof(Math.Abs));
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});
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}
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public static void Fabs_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Abs));
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});
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}
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public static void Fabs_V(AILEmitterCtx Context)
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{
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EmitVectorUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Abs));
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});
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}
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public static void Fadd_S(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitScalarSseOrSse2CallF(Context, nameof(Sse.AddScalar));
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}
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else
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Add));
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}
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}
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public static void Fadd_V(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitVectorSseOrSse2CallF(Context, nameof(Sse.Add));
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}
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else
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Add));
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}
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}
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public static void Faddp_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
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EmitVectorExtractF(Context, Op.Rn, 1, SizeF);
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Context.Emit(OpCodes.Add);
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EmitScalarSetF(Context, Op.Rd, SizeF);
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}
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public static void Faddp_V(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int Bytes = Op.GetBitsCount() >> 3;
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int Elems = Bytes >> SizeF + 2;
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int Half = Elems >> 1;
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for (int Index = 0; Index < Elems; Index++)
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{
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int Elem = (Index & (Half - 1)) << 1;
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EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF);
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EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF);
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Context.Emit(OpCodes.Add);
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EmitVectorInsertTmpF(Context, Index, SizeF);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Fdiv_S(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitScalarSseOrSse2CallF(Context, nameof(Sse.DivideScalar));
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}
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else
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Div));
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}
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}
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public static void Fdiv_V(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitVectorSseOrSse2CallF(Context, nameof(Sse.Divide));
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}
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else
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Div));
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}
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}
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public static void Fmadd_S(AILEmitterCtx Context)
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{
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EmitScalarTernaryRaOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmax_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.Max));
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});
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}
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public static void Fmax_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.Max));
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});
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}
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public static void Fmaxnm_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.MaxNum));
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});
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}
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public static void Fmaxnm_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.MaxNum));
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});
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}
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public static void Fmin_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.Min));
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});
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}
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public static void Fmin_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.Min));
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});
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}
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public static void Fminnm_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.MinNum));
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});
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}
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public static void Fminnm_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.MinNum));
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});
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}
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public static void Fmla_Se(AILEmitterCtx Context)
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{
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EmitScalarTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmla_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmla_Ve(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmls_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmls_Ve(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmsub_S(AILEmitterCtx Context)
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{
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EmitScalarTernaryRaOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmul_S(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitScalarSseOrSse2CallF(Context, nameof(Sse.MultiplyScalar));
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}
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else
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Mul));
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}
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}
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public static void Fmul_Se(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpByElemF(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Fmul_V(AILEmitterCtx Context)
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{
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if (AOptimizations.UseSse && AOptimizations.UseSse2)
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{
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EmitVectorSseOrSse2CallF(Context, nameof(Sse.Multiply));
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}
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else
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
}
|
|
|
|
public static void Fmul_Ve(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpByElemF(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
|
|
public static void Fneg_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Fneg_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Fnmadd_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
|
|
|
|
int SizeF = Op.Size & 1;
|
|
|
|
EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
|
|
|
|
Context.Emit(OpCodes.Neg);
|
|
|
|
EmitVectorExtractF(Context, Op.Rm, 0, SizeF);
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
|
|
EmitVectorExtractF(Context, Op.Ra, 0, SizeF);
|
|
|
|
Context.Emit(OpCodes.Sub);
|
|
|
|
EmitScalarSetF(Context, Op.Rd, SizeF);
|
|
}
|
|
|
|
public static void Fnmsub_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
|
|
|
|
int SizeF = Op.Size & 1;
|
|
|
|
EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
|
|
EmitVectorExtractF(Context, Op.Rm, 0, SizeF);
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
|
|
EmitVectorExtractF(Context, Op.Ra, 0, SizeF);
|
|
|
|
Context.Emit(OpCodes.Sub);
|
|
|
|
EmitScalarSetF(Context, Op.Rd, SizeF);
|
|
}
|
|
|
|
public static void Fnmul_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarBinaryOpF(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Neg);
|
|
});
|
|
}
|
|
|
|
public static void Frecpe_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnarySoftFloatCall(Context, nameof(ASoftFloat.RecipEstimate));
|
|
});
|
|
}
|
|
|
|
public static void Frecpe_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnarySoftFloatCall(Context, nameof(ASoftFloat.RecipEstimate));
|
|
});
|
|
}
|
|
|
|
public static void Frecps_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarBinaryOpF(Context, () =>
|
|
{
|
|
EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.RecipStep));
|
|
});
|
|
}
|
|
|
|
public static void Frecps_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpF(Context, () =>
|
|
{
|
|
EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.RecipStep));
|
|
});
|
|
}
|
|
|
|
public static void Frinta_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
|
|
|
|
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
|
|
|
|
EmitScalarSetF(Context, Op.Rd, Op.Size);
|
|
}
|
|
|
|
public static void Frinta_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
|
|
});
|
|
}
|
|
|
|
public static void Frinti_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
Context.EmitLdarg(ATranslatedSub.StateArgIdx);
|
|
|
|
Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
|
|
|
|
if (Op.Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.RoundF));
|
|
}
|
|
else if (Op.Size == 1)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Round));
|
|
}
|
|
else
|
|
{
|
|
throw new InvalidOperationException();
|
|
}
|
|
});
|
|
}
|
|
|
|
public static void Frinti_V(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
int SizeF = Op.Size & 1;
|
|
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
Context.EmitLdarg(ATranslatedSub.StateArgIdx);
|
|
|
|
Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
|
|
|
|
if (SizeF == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.RoundF));
|
|
}
|
|
else if (SizeF == 1)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Round));
|
|
}
|
|
else
|
|
{
|
|
throw new InvalidOperationException();
|
|
}
|
|
});
|
|
}
|
|
|
|
public static void Frintm_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnaryMathCall(Context, nameof(Math.Floor));
|
|
});
|
|
}
|
|
|
|
public static void Frintm_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnaryMathCall(Context, nameof(Math.Floor));
|
|
});
|
|
}
|
|
|
|
public static void Frintn_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
|
|
|
|
EmitRoundMathCall(Context, MidpointRounding.ToEven);
|
|
|
|
EmitScalarSetF(Context, Op.Rd, Op.Size);
|
|
}
|
|
|
|
public static void Frintn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitRoundMathCall(Context, MidpointRounding.ToEven);
|
|
});
|
|
}
|
|
|
|
public static void Frintp_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnaryMathCall(Context, nameof(Math.Ceiling));
|
|
});
|
|
}
|
|
|
|
public static void Frintp_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnaryMathCall(Context, nameof(Math.Ceiling));
|
|
});
|
|
}
|
|
|
|
public static void Frintx_S(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
Context.EmitLdarg(ATranslatedSub.StateArgIdx);
|
|
|
|
Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
|
|
|
|
if (Op.Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.RoundF));
|
|
}
|
|
else if (Op.Size == 1)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Round));
|
|
}
|
|
else
|
|
{
|
|
throw new InvalidOperationException();
|
|
}
|
|
});
|
|
}
|
|
|
|
public static void Frintx_V(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
Context.EmitLdarg(ATranslatedSub.StateArgIdx);
|
|
|
|
Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
|
|
|
|
if (Op.Size == 0)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.RoundF));
|
|
}
|
|
else if (Op.Size == 1)
|
|
{
|
|
AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Round));
|
|
}
|
|
else
|
|
{
|
|
throw new InvalidOperationException();
|
|
}
|
|
});
|
|
}
|
|
|
|
public static void Frsqrte_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnarySoftFloatCall(Context, nameof(ASoftFloat.InvSqrtEstimate));
|
|
});
|
|
}
|
|
|
|
public static void Frsqrte_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnarySoftFloatCall(Context, nameof(ASoftFloat.InvSqrtEstimate));
|
|
});
|
|
}
|
|
|
|
public static void Frsqrts_S(AILEmitterCtx Context)
|
|
{
|
|
EmitFrsqrts(Context, 0, Scalar: true);
|
|
}
|
|
|
|
public static void Frsqrts_V(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
int SizeF = Op.Size & 1;
|
|
|
|
int Bytes = Op.GetBitsCount() >> 3;
|
|
|
|
for (int Index = 0; Index < Bytes >> SizeF + 2; Index++)
|
|
{
|
|
EmitFrsqrts(Context, Index, Scalar: false);
|
|
}
|
|
|
|
if (Op.RegisterSize == ARegisterSize.SIMD64)
|
|
{
|
|
EmitVectorZeroUpper(Context, Op.Rd);
|
|
}
|
|
}
|
|
|
|
private static void EmitFrsqrts(AILEmitterCtx Context, int Index, bool Scalar)
|
|
{
|
|
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
|
|
|
|
int SizeF = Op.Size & 1;
|
|
|
|
if (SizeF == 0)
|
|
{
|
|
Context.EmitLdc_R4(3);
|
|
}
|
|
else /* if (SizeF == 1) */
|
|
{
|
|
Context.EmitLdc_R8(3);
|
|
}
|
|
|
|
EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
|
|
EmitVectorExtractF(Context, Op.Rm, Index, SizeF);
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Sub);
|
|
|
|
if (SizeF == 0)
|
|
{
|
|
Context.EmitLdc_R4(0.5f);
|
|
}
|
|
else /* if (SizeF == 1) */
|
|
{
|
|
Context.EmitLdc_R8(0.5);
|
|
}
|
|
|
|
Context.Emit(OpCodes.Mul);
|
|
|
|
if (Scalar)
|
|
{
|
|
EmitVectorZeroAll(Context, Op.Rd);
|
|
}
|
|
|
|
EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
|
|
}
|
|
|
|
public static void Fsqrt_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpF(Context, () =>
|
|
{
|
|
EmitUnaryMathCall(Context, nameof(Math.Sqrt));
|
|
});
|
|
}
|
|
|
|
public static void Fsub_S(AILEmitterCtx Context)
|
|
{
|
|
if (AOptimizations.UseSse && AOptimizations.UseSse2)
|
|
{
|
|
EmitScalarSseOrSse2CallF(Context, nameof(Sse.SubtractScalar));
|
|
}
|
|
else
|
|
{
|
|
EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
}
|
|
|
|
public static void Fsub_V(AILEmitterCtx Context)
|
|
{
|
|
if (AOptimizations.UseSse && AOptimizations.UseSse2)
|
|
{
|
|
EmitVectorSseOrSse2CallF(Context, nameof(Sse.Subtract));
|
|
}
|
|
else
|
|
{
|
|
EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
}
|
|
|
|
public static void Mla_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Mla_Ve(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpByElemZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Mls_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Sub);
|
|
});
|
|
}
|
|
|
|
public static void Mls_Ve(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpByElemZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Sub);
|
|
});
|
|
}
|
|
|
|
public static void Mul_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
|
|
public static void Mul_Ve(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpByElemZx(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
|
|
public static void Neg_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Neg_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Raddhn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitHighNarrow(Context, () => Context.Emit(OpCodes.Add), Round: true);
|
|
}
|
|
|
|
public static void Rsubhn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitHighNarrow(Context, () => Context.Emit(OpCodes.Sub), Round: true);
|
|
}
|
|
|
|
public static void Saba_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Sabal_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Sabd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
});
|
|
}
|
|
|
|
public static void Sabdl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
});
|
|
}
|
|
|
|
public static void Sadalp_V(AILEmitterCtx Context)
|
|
{
|
|
EmitAddLongPairwise(Context, Signed: true, Accumulate: true);
|
|
}
|
|
|
|
public static void Saddl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Add));
|
|
}
|
|
|
|
public static void Saddlp_V(AILEmitterCtx Context)
|
|
{
|
|
EmitAddLongPairwise(Context, Signed: true, Accumulate: false);
|
|
}
|
|
|
|
public static void Saddw_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Add));
|
|
}
|
|
|
|
public static void Shadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr);
|
|
});
|
|
}
|
|
|
|
public static void Shsub_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr);
|
|
});
|
|
}
|
|
|
|
public static void Smax_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(long), typeof(long) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Max), Types);
|
|
|
|
EmitVectorBinaryOpSx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Smaxp_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(long), typeof(long) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Max), Types);
|
|
|
|
EmitVectorPairwiseOpSx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Smin_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(long), typeof(long) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
|
|
|
|
EmitVectorBinaryOpSx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Sminp_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(long), typeof(long) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
|
|
|
|
EmitVectorPairwiseOpSx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Smlal_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Smlsl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Sub);
|
|
});
|
|
}
|
|
|
|
public static void Smull_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
|
|
public static void Sqabs_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingUnaryOpSx(Context, () => EmitAbs(Context));
|
|
}
|
|
|
|
public static void Sqabs_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingUnaryOpSx(Context, () => EmitAbs(Context));
|
|
}
|
|
|
|
public static void Sqadd_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpSx(Context, SaturatingFlags.Add);
|
|
}
|
|
|
|
public static void Sqadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpSx(Context, SaturatingFlags.Add);
|
|
}
|
|
|
|
public static void Sqdmulh_S(AILEmitterCtx Context)
|
|
{
|
|
EmitSaturatingBinaryOp(Context, () => EmitDoublingMultiplyHighHalf(Context, Round: false), SaturatingFlags.ScalarSx);
|
|
}
|
|
|
|
public static void Sqdmulh_V(AILEmitterCtx Context)
|
|
{
|
|
EmitSaturatingBinaryOp(Context, () => EmitDoublingMultiplyHighHalf(Context, Round: false), SaturatingFlags.VectorSx);
|
|
}
|
|
|
|
public static void Sqneg_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Sqneg_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
|
|
}
|
|
|
|
public static void Sqrdmulh_S(AILEmitterCtx Context)
|
|
{
|
|
EmitSaturatingBinaryOp(Context, () => EmitDoublingMultiplyHighHalf(Context, Round: true), SaturatingFlags.ScalarSx);
|
|
}
|
|
|
|
public static void Sqrdmulh_V(AILEmitterCtx Context)
|
|
{
|
|
EmitSaturatingBinaryOp(Context, () => EmitDoublingMultiplyHighHalf(Context, Round: true), SaturatingFlags.VectorSx);
|
|
}
|
|
|
|
public static void Sqsub_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpSx(Context, SaturatingFlags.Sub);
|
|
}
|
|
|
|
public static void Sqsub_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpSx(Context, SaturatingFlags.Sub);
|
|
}
|
|
|
|
public static void Sqxtn_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingNarrowOpSxSx(Context, () => { });
|
|
}
|
|
|
|
public static void Sqxtn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingNarrowOpSxSx(Context, () => { });
|
|
}
|
|
|
|
public static void Sqxtun_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingNarrowOpSxZx(Context, () => { });
|
|
}
|
|
|
|
public static void Sqxtun_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingNarrowOpSxZx(Context, () => { });
|
|
}
|
|
|
|
public static void Srhadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpSx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr);
|
|
});
|
|
}
|
|
|
|
public static void Ssubl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
|
|
public static void Ssubw_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
|
|
public static void Sub_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
|
|
public static void Sub_V(AILEmitterCtx Context)
|
|
{
|
|
if (AOptimizations.UseSse2)
|
|
{
|
|
EmitSse2Call(Context, nameof(Sse2.Subtract));
|
|
}
|
|
else
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
}
|
|
|
|
public static void Subhn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitHighNarrow(Context, () => Context.Emit(OpCodes.Sub), Round: false);
|
|
}
|
|
|
|
public static void Suqadd_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpSx(Context, SaturatingFlags.Accumulate);
|
|
}
|
|
|
|
public static void Suqadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpSx(Context, SaturatingFlags.Accumulate);
|
|
}
|
|
|
|
public static void Uaba_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Uabal_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Uabd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
});
|
|
}
|
|
|
|
public static void Uabdl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
EmitAbs(Context);
|
|
});
|
|
}
|
|
|
|
public static void Uadalp_V(AILEmitterCtx Context)
|
|
{
|
|
EmitAddLongPairwise(Context, Signed: false, Accumulate: true);
|
|
}
|
|
|
|
public static void Uaddl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
|
|
}
|
|
|
|
public static void Uaddlp_V(AILEmitterCtx Context)
|
|
{
|
|
EmitAddLongPairwise(Context, Signed: false, Accumulate: false);
|
|
}
|
|
|
|
public static void Uaddlv_V(AILEmitterCtx Context)
|
|
{
|
|
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
|
|
|
|
int Bytes = Op.GetBitsCount() >> 3;
|
|
int Elems = Bytes >> Op.Size;
|
|
|
|
EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
|
|
|
|
for (int Index = 1; Index < Elems; Index++)
|
|
{
|
|
EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
|
|
|
|
Context.Emit(OpCodes.Add);
|
|
}
|
|
|
|
EmitScalarSet(Context, Op.Rd, Op.Size + 1);
|
|
}
|
|
|
|
public static void Uaddw_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
|
|
}
|
|
|
|
public static void Uhadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr_Un);
|
|
});
|
|
}
|
|
|
|
public static void Uhsub_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Sub);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr_Un);
|
|
});
|
|
}
|
|
|
|
public static void Umax_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Max), Types);
|
|
|
|
EmitVectorBinaryOpZx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Umaxp_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Max), Types);
|
|
|
|
EmitVectorPairwiseOpZx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Umin_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
|
|
|
|
EmitVectorBinaryOpZx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Uminp_V(AILEmitterCtx Context)
|
|
{
|
|
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
|
|
|
|
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
|
|
|
|
EmitVectorPairwiseOpZx(Context, () => Context.EmitCall(MthdInfo));
|
|
}
|
|
|
|
public static void Umlal_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Add);
|
|
});
|
|
}
|
|
|
|
public static void Umlsl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmTernaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Mul);
|
|
Context.Emit(OpCodes.Sub);
|
|
});
|
|
}
|
|
|
|
public static void Umull_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
|
|
}
|
|
|
|
public static void Uqadd_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpZx(Context, SaturatingFlags.Add);
|
|
}
|
|
|
|
public static void Uqadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpZx(Context, SaturatingFlags.Add);
|
|
}
|
|
|
|
public static void Uqsub_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpZx(Context, SaturatingFlags.Sub);
|
|
}
|
|
|
|
public static void Uqsub_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpZx(Context, SaturatingFlags.Sub);
|
|
}
|
|
|
|
public static void Uqxtn_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingNarrowOpZxZx(Context, () => { });
|
|
}
|
|
|
|
public static void Uqxtn_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingNarrowOpZxZx(Context, () => { });
|
|
}
|
|
|
|
public static void Urhadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorBinaryOpZx(Context, () =>
|
|
{
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Add);
|
|
|
|
Context.Emit(OpCodes.Ldc_I4_1);
|
|
Context.Emit(OpCodes.Shr_Un);
|
|
});
|
|
}
|
|
|
|
public static void Usqadd_S(AILEmitterCtx Context)
|
|
{
|
|
EmitScalarSaturatingBinaryOpZx(Context, SaturatingFlags.Accumulate);
|
|
}
|
|
|
|
public static void Usqadd_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorSaturatingBinaryOpZx(Context, SaturatingFlags.Accumulate);
|
|
}
|
|
|
|
public static void Usubl_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
|
|
public static void Usubw_V(AILEmitterCtx Context)
|
|
{
|
|
EmitVectorWidenRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
|
|
}
|
|
}
|
|
}
|