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Ryujinx/ARMeilleure/IntermediateRepresentation
FICTURE7 8b3eba7e13
Reduce allocation during SSA construction (#2162)
* Reduce allocation during SSA construction

* Re-trigger CI
2021-04-02 19:26:16 +02:00
..
BasicBlock.cs Implement block placement (#1549) 2020-09-19 20:00:24 -03:00
BasicBlockFrequency.cs Implement block placement (#1549) 2020-09-19 20:00:24 -03:00
Comparison.cs Improve branch operations (#1442) 2020-08-05 08:52:33 +10:00
IIntrusiveListNode.cs
Instruction.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
Intrinsic.cs CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894) 2021-01-20 09:12:33 +11:00
IntrinsicOperation.cs
IntrusiveList.cs
MemoryOperand.cs
Multiplier.cs
Node.cs
Operand.cs Reduce allocation during SSA construction (#2162) 2021-04-02 19:26:16 +02:00
OperandHelper.cs PPTC & Pool Enhancements. (#1968) 2021-02-22 03:23:48 +01:00
OperandKind.cs
OperandType.cs
Operation.cs
OperationHelper.cs PPTC & Pool Enhancements. (#1968) 2021-02-22 03:23:48 +01:00
PhiNode.cs
Register.cs
RegisterType.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00