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https://github.com/Ryujinx/Ryujinx.git
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7b35ebc64a
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2
9 lines
No EOL
192 B
C#
9 lines
No EOL
192 B
C#
namespace Ryujinx.Tests.Cpu
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{
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public class PrecomputedThumbTestCase
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{
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public ushort[] Instructions;
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public uint[] StartRegs;
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public uint[] FinalRegs;
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}
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} |