2020-12-23 16:39:22 +00:00
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/*
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* eMMC BIS driver for Nintendo Switch
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*
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* Copyright (c) 2019 shchmue
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* Copyright (c) 2019-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include <memory_map.h>
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#include <mem/heap.h>
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#include <sec/se.h>
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#include "../storage/nx_emmc.h"
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#include "nx_emmc_bis.h"
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#include <storage/sdmmc.h>
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#include <utils/types.h>
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#define MAX_CLUSTER_CACHE_ENTRIES 32768
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#define CLUSTER_LOOKUP_EMPTY_ENTRY 0xFFFFFFFF
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#define SECTORS_PER_CLUSTER 0x20
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typedef struct
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{
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u32 cluster_num; // index of the cluster in the partition
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u32 visit_count; // used for debugging/access analysis
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u8 dirty; // has been modified without writeback flag
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u8 align[7];
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u8 cluster[XTS_CLUSTER_SIZE]; // the cached cluster itself
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} cluster_cache_t;
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typedef struct
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{
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u8 emmc_buffer[XTS_CLUSTER_SIZE];
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cluster_cache_t cluster_cache[];
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} bis_cache_t;
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static u8 ks_crypt = 0;
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static u8 ks_tweak = 0;
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static u8 cache_filled = 0;
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static u32 dirty_cluster_count = 0;
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static u32 cluster_cache_end_index = 0;
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static emmc_part_t *system_part = NULL;
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static bis_cache_t *bis_cache = (bis_cache_t *)NX_BIS_CACHE_ADDR;
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static u32 *cluster_lookup_buf = NULL;
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static u32 *cluster_lookup = NULL;
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static bool lock_cluster_cache = false;
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static void _gf256_mul_x_le(void *block)
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{
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u32 *pdata = (u32 *)block;
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u32 carry = 0;
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for (u32 i = 0; i < 4; i++)
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{
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u32 b = pdata[i];
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pdata[i] = (b << 1) | carry;
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carry = b >> 31;
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}
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if (carry)
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pdata[0x0] ^= 0x87;
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}
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static int _nx_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u8 *tweak, bool regen_tweak, u32 tweak_exp, u32 sec, void *dst, const void *src, u32 sec_size)
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{
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u32 *pdst = (u32 *)dst;
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u32 *psrc = (u32 *)src;
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u32 *ptweak = (u32 *)tweak;
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if (regen_tweak)
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{
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for (int i = 0xF; i >= 0; i--)
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{
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tweak[i] = sec & 0xFF;
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sec >>= 8;
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}
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if (!se_aes_crypt_block_ecb(tweak_ks, 1, tweak, tweak))
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return 0;
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}
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// tweak_exp allows us to use a saved tweak to reduce _gf256_mul_x_le calls.
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for (u32 i = 0; i < (tweak_exp << 5); i++)
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_gf256_mul_x_le(tweak);
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u8 orig_tweak[0x10] __attribute__((aligned(4)));
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memcpy(orig_tweak, tweak, 0x10);
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// We are assuming a 0x10-aligned sector size in this implementation.
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for (u32 i = 0; i < (sec_size >> 4); i++)
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{
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for (u32 j = 0; j < 4; j++)
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pdst[j] = psrc[j] ^ ptweak[j];
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_gf256_mul_x_le(tweak);
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psrc += 4;
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pdst += 4;
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}
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if (!se_aes_crypt_ecb(crypt_ks, enc, dst, sec_size, dst, sec_size))
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return 0;
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pdst = (u32 *)dst;
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ptweak = (u32 *)orig_tweak;
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for (u32 i = 0; i < (sec_size >> 4); i++)
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{
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for (u32 j = 0; j < 4; j++)
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pdst[j] = pdst[j] ^ ptweak[j];
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_gf256_mul_x_le(orig_tweak);
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pdst += 4;
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}
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return 1;
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}
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static int nx_emmc_bis_write_block(u32 sector, u32 count, void *buff, bool force_flush)
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{
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if (!system_part)
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return 3; // Not ready.
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u8 tweak[0x10] __attribute__((aligned(4)));
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u32 cluster = sector / SECTORS_PER_CLUSTER;
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u32 aligned_sector = cluster * SECTORS_PER_CLUSTER;
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u32 sector_index_in_cluster = sector % SECTORS_PER_CLUSTER;
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u32 cluster_lookup_index = cluster_lookup[cluster];
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bool is_cached = cluster_lookup_index != CLUSTER_LOOKUP_EMPTY_ENTRY;
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// Write to cached cluster.
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if (is_cached)
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{
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if (buff)
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memcpy(bis_cache->cluster_cache[cluster_lookup_index].cluster + sector_index_in_cluster * NX_EMMC_BLOCKSIZE, buff, count * NX_EMMC_BLOCKSIZE);
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else
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buff = bis_cache->cluster_cache[cluster_lookup_index].cluster;
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bis_cache->cluster_cache[cluster_lookup_index].visit_count++;
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if (bis_cache->cluster_cache[cluster_lookup_index].dirty == 0)
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dirty_cluster_count++;
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bis_cache->cluster_cache[cluster_lookup_index].dirty = 1;
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if (!force_flush)
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return 0; // Success.
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// Reset args to trigger a full cluster flush to emmc.
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sector_index_in_cluster = 0;
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sector = aligned_sector;
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count = SECTORS_PER_CLUSTER;
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}
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// Encrypt and write.
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if (!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 1, tweak, true, sector_index_in_cluster, cluster, bis_cache->emmc_buffer, buff, count * NX_EMMC_BLOCKSIZE) ||
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!nx_emmc_part_write(&emmc_storage, system_part, sector, count, bis_cache->emmc_buffer)
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)
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return 1; // R/W error.
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// Mark cache entry not dirty if write succeeds.
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if (is_cached)
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{
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bis_cache->cluster_cache[cluster_lookup_index].dirty = 0;
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dirty_cluster_count--;
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}
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return 0; // Success.
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}
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static void _nx_emmc_bis_flush_cluster(cluster_cache_t *cache_entry)
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{
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nx_emmc_bis_write_block(cache_entry->cluster_num * SECTORS_PER_CLUSTER, SECTORS_PER_CLUSTER, NULL, true);
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}
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static int nx_emmc_bis_read_block(u32 sector, u32 count, void *buff)
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{
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if (!system_part)
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return 3; // Not ready.
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static u32 prev_cluster = -1;
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static u32 prev_sector = 0;
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static u8 tweak[0x10] __attribute__((aligned(4)));
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u8 cache_tweak[0x10] __attribute__((aligned(4)));
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u32 tweak_exp = 0;
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bool regen_tweak = true;
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u32 cluster = sector / SECTORS_PER_CLUSTER;
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u32 aligned_sector = cluster * SECTORS_PER_CLUSTER;
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u32 sector_index_in_cluster = sector % SECTORS_PER_CLUSTER;
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u32 cluster_lookup_index = cluster_lookup[cluster];
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// Read from cached cluster.
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if (cluster_lookup_index != CLUSTER_LOOKUP_EMPTY_ENTRY)
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{
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memcpy(buff, bis_cache->cluster_cache[cluster_lookup_index].cluster + sector_index_in_cluster * NX_EMMC_BLOCKSIZE, count * NX_EMMC_BLOCKSIZE);
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bis_cache->cluster_cache[cluster_lookup_index].visit_count++;
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prev_sector = sector + count - 1;
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prev_cluster = cluster;
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return 0; // Success.
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}
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// Cache cluster.
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if (!lock_cluster_cache)
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{
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// Roll the cache index over and flush if full.
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if (cluster_cache_end_index >= MAX_CLUSTER_CACHE_ENTRIES)
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{
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cluster_cache_end_index = 0;
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cache_filled = 1;
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}
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// Check if cache entry was previously in use in case of cache loop.
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if (cache_filled == 1 && bis_cache->cluster_cache[cluster_cache_end_index].dirty == 1)
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_nx_emmc_bis_flush_cluster(&bis_cache->cluster_cache[cluster_cache_end_index]);
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bis_cache->cluster_cache[cluster_cache_end_index].cluster_num = cluster;
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bis_cache->cluster_cache[cluster_cache_end_index].visit_count = 1;
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bis_cache->cluster_cache[cluster_cache_end_index].dirty = 0;
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cluster_lookup[cluster] = cluster_cache_end_index;
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// Read and decrypt the whole cluster the sector resides in.
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if (!nx_emmc_part_read(&emmc_storage, system_part, aligned_sector, SECTORS_PER_CLUSTER, bis_cache->emmc_buffer) ||
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!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, cache_tweak, true, 0, cluster, bis_cache->emmc_buffer, bis_cache->emmc_buffer, XTS_CLUSTER_SIZE)
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)
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return 1; // R/W error.
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// Copy to cluster cache.
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memcpy(bis_cache->cluster_cache[cluster_cache_end_index].cluster, bis_cache->emmc_buffer, XTS_CLUSTER_SIZE);
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memcpy(buff, bis_cache->emmc_buffer + sector_index_in_cluster * NX_EMMC_BLOCKSIZE, count * NX_EMMC_BLOCKSIZE);
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cluster_cache_end_index++;
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return 0; // Success.
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}
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// If not reading from or writing to cache, do a regular read and decrypt.
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if (!nx_emmc_part_read(&emmc_storage, system_part, sector, count, bis_cache->emmc_buffer))
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return 1; // R/W error.
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if (prev_cluster != cluster) // Sector in different cluster than last read.
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{
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prev_cluster = cluster;
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tweak_exp = sector_index_in_cluster;
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}
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else if (sector > prev_sector) // Sector in same cluster and past last sector.
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{
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// Calculates the new tweak using the saved one, reducing expensive _gf256_mul_x_le calls.
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tweak_exp = sector - prev_sector - 1;
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regen_tweak = false;
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}
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else // Sector in same cluster and before or same as last sector.
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tweak_exp = sector_index_in_cluster;
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// Maximum one cluster (1 XTS crypto block 16KB).
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if (!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, tweak, regen_tweak, tweak_exp, prev_cluster, buff, bis_cache->emmc_buffer, count * NX_EMMC_BLOCKSIZE))
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return 1; // R/W error.
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prev_sector = sector + count - 1;
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return 0; // Success.
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}
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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{
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int res = 1;
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u8 *buf = (u8 *)buff;
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u32 curr_sct = sector;
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while (count)
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{
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u32 sct_cnt = MIN(count, 0x20);
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res = nx_emmc_bis_read_block(curr_sct, sct_cnt, buf);
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if (res)
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return 1;
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count -= sct_cnt;
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curr_sct += sct_cnt;
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buf += NX_EMMC_BLOCKSIZE * sct_cnt;
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}
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return res;
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}
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int nx_emmc_bis_write(u32 sector, u32 count, void *buff)
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{
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int res = 1;
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u8 *buf = (u8 *)buff;
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u32 curr_sct = sector;
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while (count)
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{
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u32 sct_cnt = MIN(count, 0x20);
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res = nx_emmc_bis_write_block(curr_sct, sct_cnt, buf, false);
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if (res)
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return 1;
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count -= sct_cnt;
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curr_sct += sct_cnt;
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buf += NX_EMMC_BLOCKSIZE * sct_cnt;
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}
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2020-12-26 21:24:41 +00:00
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nx_emmc_bis_finalize();
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2020-12-23 16:39:22 +00:00
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return res;
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}
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void nx_emmc_bis_cluster_cache_init()
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{
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u32 cluster_lookup_size = (system_part->lba_end - system_part->lba_start + 1) / SECTORS_PER_CLUSTER * sizeof(*cluster_lookup);
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if (cluster_lookup_buf)
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free(cluster_lookup_buf);
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// Check if carveout protected, in case of old hwinit (pre 4.0.0) chainload.
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*(vu32 *)NX_BIS_LOOKUP_ADR = 0;
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if (*(vu32 *)NX_BIS_LOOKUP_ADR != 0)
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{
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cluster_lookup_buf = (u32 *)malloc(cluster_lookup_size + 0x2000);
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cluster_lookup = (u32 *)ALIGN((u32)cluster_lookup_buf, 0x1000);
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}
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else
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{
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cluster_lookup_buf = NULL;
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cluster_lookup = (u32 *)NX_BIS_LOOKUP_ADR;
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}
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// Clear cluster lookup table and reset end index.
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memset(cluster_lookup, -1, cluster_lookup_size);
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cluster_cache_end_index = 0;
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lock_cluster_cache = false;
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dirty_cluster_count = 0;
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cache_filled = 0;
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}
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void nx_emmc_bis_init(emmc_part_t *part)
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{
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system_part = part;
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nx_emmc_bis_cluster_cache_init();
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switch (part->index)
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{
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case 0: // PRODINFO.
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case 1: // PRODINFOF.
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ks_crypt = 0;
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ks_tweak = 1;
|
|
|
|
break;
|
|
|
|
case 8: // SAFE.
|
|
|
|
ks_crypt = 2;
|
|
|
|
ks_tweak = 3;
|
|
|
|
break;
|
|
|
|
case 9: // SYSTEM.
|
|
|
|
case 10: // USER.
|
|
|
|
ks_crypt = 4;
|
|
|
|
ks_tweak = 5;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void nx_emmc_bis_finalize()
|
|
|
|
{
|
|
|
|
if (dirty_cluster_count == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
u32 limit = cache_filled == 1 ? MAX_CLUSTER_CACHE_ENTRIES : cluster_cache_end_index;
|
|
|
|
u32 clusters_to_flush = dirty_cluster_count;
|
|
|
|
for (u32 i = 0; i < limit && clusters_to_flush; i++)
|
|
|
|
{
|
|
|
|
if (bis_cache->cluster_cache[i].dirty) {
|
|
|
|
_nx_emmc_bis_flush_cluster(&bis_cache->cluster_cache[i]);
|
|
|
|
clusters_to_flush--;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Set cluster cache lock according to arg.
|
|
|
|
void nx_emmc_bis_cache_lock(bool lock)
|
|
|
|
{
|
|
|
|
lock_cluster_cache = lock;
|
|
|
|
}
|