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https://github.com/suchmememanyskill/TegraExplorer.git
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Fix small build
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4505217b2c
commit
84e120dabf
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@ -17,7 +17,6 @@
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#ifndef _MEMORY_MAP_H_
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#define _MEMORY_MAP_H_
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//#define IPL_STACK_TOP 0x4003FF00
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/* --- BIT/BCT: 0x40000000 - 0x40003000 --- */
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/* --- IPL: 0x40008000 - 0x40028000 --- */
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#define LDR_LOAD_ADDR 0x40007000
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@ -25,13 +24,20 @@
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#define IPL_LOAD_ADDR 0x40008000
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#define IPL_SZ_MAX SZ_128K
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/* --- XUSB EP context and TRB ring buffers --- */
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#define XUSB_RING_ADDR 0x40020000
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#define XUSB_RING_ADDR 0x40020000 // XUSB EP context and TRB ring buffers.
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#define SECMON_MIN_START 0x4002B000
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#define SECMON_MIN_START 0x4002B000 // Minimum reserved address for secmon.
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#define SDRAM_PARAMS_ADDR 0x40030000 // SDRAM extraction buffer during sdram init.
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#define CBFS_DRAM_EN_ADDR 0x4003e000 // u32.
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/* start.S / exception_handlers.S */
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#define SYS_STACK_TOP_INIT 0x4003FF00
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#define FIQ_STACK_TOP 0x40040000
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#define IRQ_STACK_TOP 0x40040000
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#define IPL_RELOC_ADDR 0x4003FF00
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#define IPL_RELOC_SZ 0x10
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#define EXCP_STORAGE_ADDR 0x4003FFF0
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#define EXCP_STORAGE_SZ 0x10
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/* --- DRAM START --- */
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#define DRAM_START 0x80000000
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@ -48,16 +54,10 @@
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/* --- Gap: 1040MB 0xA4000000 - 0xE4FFFFFF --- */
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// Virtual disk / Chainloader buffers.
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#define RAM_DISK_ADDR 0xA4000000
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#define RAM_DISK_SZ 0x41000000 // 1040MB.
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#define RAM_DISK_ADDR 0xA4000000
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#define RAM_DISK_SZ 0x41000000 // 1040MB.
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#define RAM_DISK2_SZ 0x21000000 // 528MB.
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// NX BIS driver sector cache.
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#define NX_BIS_CACHE_ADDR 0xC5000000
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#define NX_BIS_CACHE_SZ 0x10020000 // 256MB.
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#define NX_BIS_LOOKUP_ADDR 0xD6000000
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#define NX_BIS_LOOKUP_SZ 0xF000000 // 240MB.
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// L4T Kernel Panic Storage (PSTORE).
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#define PSTORE_ADDR 0xB0000000
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#define PSTORE_SZ SZ_2M
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@ -77,7 +77,6 @@
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// SDMMC DMA buffers 2
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#define SDXC_BUF_ALIGNED 0xEF000000
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#define MIXD_BUF_ALIGNED 0xF0000000
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#define TITLEKEY_BUF_ADR MIXD_BUF_ALIGNED
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#define EMMC_BUF_ALIGNED MIXD_BUF_ALIGNED
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#define SDMMC_DMA_BUF_SZ SZ_16M // 4MB currently used.
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@ -96,6 +95,7 @@
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#define NYX_FB2_ADDRESS 0xF6600000
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#define NYX_FB_SZ 0x384000 // 1280 x 720 x 4.
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/* OBSOLETE: Very old hwinit based payloads were setting a carveout here. */
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#define DRAM_MEM_HOLE_ADR 0xF6A00000
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#define DRAM_MEM_HOLE_SZ 0x8140000
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/* --- Hole: 129MB 0xF6A00000 - 0xFEB3FFFF --- */
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@ -113,4 +113,10 @@
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// #define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10))
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// #define COREBOOT_ADDR (0xD0000000 - rom_size)
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// NX BIS driver sector cache.
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#define NX_BIS_CACHE_ADDR 0xC5000000
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#define NX_BIS_CACHE_SZ 0x10020000 // 256MB.
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#define NX_BIS_LOOKUP_ADDR DRAM_MEM_HOLE_ADR
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#define NX_BIS_LOOKUP_SZ DRAM_MEM_HOLE_SZ
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#endif
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@ -5,7 +5,9 @@ SECTIONS {
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. = __ipl_start;
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.text : {
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*(.text._start);
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*(._boot_cfg);
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KEEP(*(._boot_cfg));
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KEEP(*(._ipl_version));
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*(.text._irq_setup);
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*(.text*);
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}
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.data : {
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