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https://github.com/suchmememanyskill/TegraExplorer.git
synced 2024-09-07 23:37:20 +01:00
Don't train memory
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cf90fc8dd0
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@ -118,7 +118,7 @@ static void _derive_bis_keys(key_derivation_ctx_t *keys) {
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/* key = unwrap(source, wrapped_key):
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key_set(ks, wrapped_key), block_ecb(ks, 0, key, source) -> final key in key
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*/
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minerva_periodic_training();
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u32 key_generation = fuse_read_odm_keygen_rev();
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if (key_generation)
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key_generation--;
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@ -197,8 +197,6 @@ static bool _derive_tsec_keys(tsec_ctxt_t *tsec_ctxt, key_derivation_ctx_t *keys
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return false;
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}
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minerva_periodic_training();
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tsec_ctxt->size = _get_tsec_fw_size((tsec_key_data_t *)(tsec_ctxt->fw + TSEC_KEY_DATA_OFFSET));
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if (tsec_ctxt->size > PKG1_MAX_SIZE) {
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DPRINTF("Unexpected TSEC firmware size.");
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@ -250,10 +250,8 @@ void ipl_main()
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TConf.minervaEnabled = !minerva_init();
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TConf.FSBuffSize = (TConf.minervaEnabled) ? 0x800000 : 0x10000;
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// Train DRAM and switch to max frequency.
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if (TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
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if (!TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
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h_cfg.errors |= ERR_LIBSYS_MTC;
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minerva_change_freq(FREQ_1600);
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display_init();
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@ -267,6 +265,7 @@ void ipl_main()
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// Overclock BPMP.
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bpmp_clk_rate_set(BPMP_CLK_DEFAULT_BOOST);
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minerva_change_freq(FREQ_800);
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emummc_load_cfg();
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// Ignore whether emummc is enabled.
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@ -277,23 +276,11 @@ void ipl_main()
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TConf.pkg1ID = "Unk";
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hidInit();
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//gfx_clearscreen();
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//Vector_t a = vecFromArray(testEntries, 9, sizeof(MenuEntry_t));
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//u32 res = newMenu(&a, 0, 40, 5, testAdd, NULL);
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//gfx_clearscreen();
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//DrawError(newErrCode(1));
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// TODO: Write exceptions in err.c and check them here
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_show_errors();
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gfx_clearscreen();
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int res = -1;
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if (btn_read() & BTN_VOL_DOWN || DumpKeys())
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res = GetKeysFromFile("sd:/switch/prod.keys");
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