1
0
Fork 0
mirror of https://github.com/suchmememanyskill/TegraExplorer.git synced 2024-11-22 03:46:40 +00:00

Don't train memory

This commit is contained in:
suchmememanyskill 2023-07-28 14:00:59 +02:00
parent cf90fc8dd0
commit 8a568e42ba
2 changed files with 3 additions and 18 deletions

View file

@ -118,7 +118,7 @@ static void _derive_bis_keys(key_derivation_ctx_t *keys) {
/* key = unwrap(source, wrapped_key):
key_set(ks, wrapped_key), block_ecb(ks, 0, key, source) -> final key in key
*/
minerva_periodic_training();
u32 key_generation = fuse_read_odm_keygen_rev();
if (key_generation)
key_generation--;
@ -197,8 +197,6 @@ static bool _derive_tsec_keys(tsec_ctxt_t *tsec_ctxt, key_derivation_ctx_t *keys
return false;
}
minerva_periodic_training();
tsec_ctxt->size = _get_tsec_fw_size((tsec_key_data_t *)(tsec_ctxt->fw + TSEC_KEY_DATA_OFFSET));
if (tsec_ctxt->size > PKG1_MAX_SIZE) {
DPRINTF("Unexpected TSEC firmware size.");

View file

@ -250,10 +250,8 @@ void ipl_main()
TConf.minervaEnabled = !minerva_init();
TConf.FSBuffSize = (TConf.minervaEnabled) ? 0x800000 : 0x10000;
// Train DRAM and switch to max frequency.
if (TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
if (!TConf.minervaEnabled) //!TODO: Add Tegra210B01 support to minerva.
h_cfg.errors |= ERR_LIBSYS_MTC;
minerva_change_freq(FREQ_1600);
display_init();
@ -267,6 +265,7 @@ void ipl_main()
// Overclock BPMP.
bpmp_clk_rate_set(BPMP_CLK_DEFAULT_BOOST);
minerva_change_freq(FREQ_800);
emummc_load_cfg();
// Ignore whether emummc is enabled.
@ -277,23 +276,11 @@ void ipl_main()
TConf.pkg1ID = "Unk";
hidInit();
//gfx_clearscreen();
//Vector_t a = vecFromArray(testEntries, 9, sizeof(MenuEntry_t));
//u32 res = newMenu(&a, 0, 40, 5, testAdd, NULL);
//gfx_clearscreen();
//DrawError(newErrCode(1));
// TODO: Write exceptions in err.c and check them here
_show_errors();
gfx_clearscreen();
int res = -1;
if (btn_read() & BTN_VOL_DOWN || DumpKeys())
res = GetKeysFromFile("sd:/switch/prod.keys");