2014-04-16 05:03:41 +01:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "common/log.h"
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2014-04-26 06:48:24 +01:00
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#include "core/mem_map.h"
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2014-04-16 05:03:41 +01:00
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#include "core/hle/hle.h"
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#include "core/hle/service/gsp.h"
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2014-04-26 06:48:24 +01:00
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#include "core/hw/lcd.h"
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2014-04-17 01:46:05 +01:00
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Namespace GSP_GPU
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2014-04-16 05:03:41 +01:00
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namespace GSP_GPU {
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2014-04-26 06:48:24 +01:00
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enum {
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REG_FRAMEBUFFER_1 = 0x00400468,
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REG_FRAMEBUFFER_2 = 0x00400494,
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};
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/// Read a GSP GPU hardware register
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void ReadHWRegs(Service::Interface* self) {
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2014-04-27 17:41:25 +01:00
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static const u32 framebuffer_1[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME1, LCD::PADDR_VRAM_TOP_RIGHT_FRAME1};
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static const u32 framebuffer_2[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME2, LCD::PADDR_VRAM_TOP_RIGHT_FRAME2};
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2014-04-26 06:48:24 +01:00
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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u32 reg_addr = cmd_buff[1];
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u32 size = cmd_buff[2];
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u32* dst = (u32*)Memory::GetPointer(cmd_buff[0x41]);
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switch (reg_addr) {
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2014-04-27 17:41:25 +01:00
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// NOTE: Calling SetFramebufferLocation here is a hack... Not sure the correct way yet to set
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// whether the framebuffers should be in VRAM or GSP heap, but from what I understand, if the
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// user application is reading from either of these registers, then its going to be in VRAM.
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2014-04-26 06:48:24 +01:00
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// Top framebuffer 1 addresses
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case REG_FRAMEBUFFER_1:
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2014-04-27 17:41:25 +01:00
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LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
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2014-04-26 06:48:24 +01:00
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memcpy(dst, framebuffer_1, size);
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break;
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// Top framebuffer 2 addresses
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case REG_FRAMEBUFFER_2:
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2014-04-27 17:41:25 +01:00
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LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
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memcpy(dst, framebuffer_2, size);
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2014-04-26 06:48:24 +01:00
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break;
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default:
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ERROR_LOG(OSHLE, "GSP_GPU::ReadHWRegs unknown register read at address %08X", reg_addr);
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}
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}
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2014-04-25 03:20:13 +01:00
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void RegisterInterruptRelayQueue(Service::Interface* self) {
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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u32 flags = cmd_buff[1];
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u32 event_handle = cmd_buff[3]; // TODO(bunnei): Implement event handling
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cmd_buff[4] = self->NewHandle();
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return;
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}
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const Interface::FunctionInfo FunctionTable[] = {
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{0x00010082, NULL, "WriteHWRegs"},
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{0x00020084, NULL, "WriteHWRegsWithMask"},
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{0x00030082, NULL, "WriteHWRegRepeat"},
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2014-04-26 06:48:24 +01:00
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{0x00040080, ReadHWRegs, "ReadHWRegs"},
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2014-04-25 03:20:13 +01:00
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{0x00050200, NULL, "SetBufferSwap"},
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{0x00060082, NULL, "SetCommandList"},
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{0x000700C2, NULL, "RequestDma"},
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{0x00080082, NULL, "FlushDataCache"},
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{0x00090082, NULL, "InvalidateDataCache"},
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{0x000A0044, NULL, "RegisterInterruptEvents"},
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{0x000B0040, NULL, "SetLcdForceBlack"},
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{0x000C0000, NULL, "TriggerCmdReqQueue"},
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{0x000D0140, NULL, "SetDisplayTransfer"},
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{0x000E0180, NULL, "SetTextureCopy"},
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{0x000F0200, NULL, "SetMemoryFill"},
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{0x00100040, NULL, "SetAxiConfigQoSMode"},
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{0x00110040, NULL, "SetPerfLogMode"},
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{0x00120000, NULL, "GetPerfLog"},
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{0x00130042, RegisterInterruptRelayQueue, "RegisterInterruptRelayQueue"},
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{0x00140000, NULL, "UnregisterInterruptRelayQueue"},
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{0x00150002, NULL, "TryAcquireRight"},
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{0x00160042, NULL, "AcquireRight"},
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{0x00170000, NULL, "ReleaseRight"},
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{0x00180000, NULL, "ImportDisplayCaptureInfo"},
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{0x00190000, NULL, "SaveVramSysArea"},
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{0x001A0000, NULL, "RestoreVramSysArea"},
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{0x001B0000, NULL, "ResetGpuCore"},
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{0x001C0040, NULL, "SetLedForceOff"},
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{0x001D0040, NULL, "SetTestCommand"},
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{0x001E0080, NULL, "SetInternalPriorities"},
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2014-04-16 05:03:41 +01:00
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Interface class
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Interface::Interface() {
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Register(FunctionTable, ARRAY_SIZE(FunctionTable));
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}
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Interface::~Interface() {
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}
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} // namespace
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