core: Remove outdated MSVC workarounds (#5099)
* core/hw/gpu: Remove outdated MSVC workarounds * core/hle/service/hid: Remove MSVC workaround
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3 changed files with 2 additions and 40 deletions
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@ -6,9 +6,7 @@
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#include <array>
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#include <atomic>
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#ifndef _MSC_VER
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#include <cstddef>
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#endif
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#include <memory>
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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@ -177,10 +175,6 @@ struct GyroscopeCalibrateParam {
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} x, y, z;
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};
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// TODO: MSVC does not support using offsetof() on non-static data members even though this
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// is technically allowed since C++11. This macro should be enabled once MSVC adds
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// support for that.
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#ifndef _MSC_VER
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#define ASSERT_REG_POSITION(field_name, position) \
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static_assert(offsetof(SharedMem, field_name) == position * 4, \
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"Field " #field_name " has invalid position")
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@ -189,7 +183,6 @@ ASSERT_REG_POSITION(pad.index_reset_ticks, 0x0);
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ASSERT_REG_POSITION(touch.index_reset_ticks, 0x2A);
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#undef ASSERT_REG_POSITION
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#endif // !defined(_MSC_VER)
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struct DirectionState {
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bool up;
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@ -402,8 +402,8 @@ inline void Write(u32 addr, const T data) {
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switch (index) {
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// Memory fills are triggered once the fill value is written.
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case GPU_REG_INDEX_WORKAROUND(memory_fill_config[0].trigger, 0x00004 + 0x3):
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case GPU_REG_INDEX_WORKAROUND(memory_fill_config[1].trigger, 0x00008 + 0x3): {
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case GPU_REG_INDEX(memory_fill_config[0].trigger):
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case GPU_REG_INDEX(memory_fill_config[1].trigger): {
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const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
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auto& config = g_regs.memory_fill_config[is_second_filler];
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@ -20,41 +20,15 @@ namespace GPU {
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constexpr float SCREEN_REFRESH_RATE = 60;
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// Returns index corresponding to the Regs member labeled by field_name
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// TODO: Due to Visual studio bug 209229, offsetof does not return constant expressions
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// when used with array elements (e.g. GPU_REG_INDEX(memory_fill_config[0])).
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// For details cf.
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// https://connect.microsoft.com/VisualStudio/feedback/details/209229/offsetof-does-not-produce-a-constant-expression-for-array-members
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// Hopefully, this will be fixed sometime in the future.
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// For lack of better alternatives, we currently hardcode the offsets when constant
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// expressions are needed via GPU_REG_INDEX_WORKAROUND (on sane compilers, static_asserts
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// will then make sure the offsets indeed match the automatically calculated ones).
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#define GPU_REG_INDEX(field_name) (offsetof(GPU::Regs, field_name) / sizeof(u32))
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#if defined(_MSC_VER)
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#define GPU_REG_INDEX_WORKAROUND(field_name, backup_workaround_index) (backup_workaround_index)
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#else
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// NOTE: Yeah, hacking in a static_assert here just to workaround the lacking MSVC compiler
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// really is this annoying. This macro just forwards its first argument to GPU_REG_INDEX
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// and then performs a (no-op) cast to std::size_t iff the second argument matches the
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// expected field offset. Otherwise, the compiler will fail to compile this code.
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#define GPU_REG_INDEX_WORKAROUND(field_name, backup_workaround_index) \
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((typename std::enable_if<backup_workaround_index == GPU_REG_INDEX(field_name), \
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std::size_t>::type) GPU_REG_INDEX(field_name))
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#endif
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// MMIO region 0x1EFxxxxx
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struct Regs {
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// helper macro to make sure the defined structures are of the expected size.
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#if defined(_MSC_VER)
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// TODO: MSVC does not support using sizeof() on non-static data members even though this
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// is technically allowed since C++11. This macro should be enabled once MSVC adds
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// support for that.
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#define ASSERT_MEMBER_SIZE(name, size_in_bytes)
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#else
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#define ASSERT_MEMBER_SIZE(name, size_in_bytes) \
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static_assert(sizeof(name) == size_in_bytes, \
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"Structure size and register block length don't match")
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#endif
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// Components are laid out in reverse byte order, most significant bits first.
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enum class PixelFormat : u32 {
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@ -299,10 +273,6 @@ private:
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};
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static_assert(std::is_standard_layout<Regs>::value, "Structure does not use standard layout");
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// TODO: MSVC does not support using offsetof() on non-static data members even though this
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// is technically allowed since C++11. This macro should be enabled once MSVC adds
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// support for that.
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#ifndef _MSC_VER
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#define ASSERT_REG_POSITION(field_name, position) \
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static_assert(offsetof(Regs, field_name) == position * 4, \
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"Field " #field_name " has invalid position")
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@ -315,7 +285,6 @@ ASSERT_REG_POSITION(display_transfer_config, 0x00300);
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ASSERT_REG_POSITION(command_processor_config, 0x00638);
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#undef ASSERT_REG_POSITION
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#endif // !defined(_MSC_VER)
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// The total number of registers is chosen arbitrarily, but let's make sure it's not some odd value
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// anyway.
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