Merge pull request #5184 from MerryMage/dyn-update-2020-04
Update dynarmic (Apr 2020)
This commit is contained in:
commit
f75cc8be64
9 changed files with 123 additions and 100 deletions
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@ -32,7 +32,7 @@ matrix:
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- os: osx
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- os: osx
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env: NAME="macos build"
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env: NAME="macos build"
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sudo: false
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sudo: false
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osx_image: xcode10
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osx_image: xcode10.2
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install: "./.travis/macos/deps.sh"
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install: "./.travis/macos/deps.sh"
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script: "./.travis/macos/build.sh"
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script: "./.travis/macos/build.sh"
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after_success: "./.travis/macos/upload.sh"
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after_success: "./.travis/macos/upload.sh"
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2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
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@ -1 +1 @@
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Subproject commit 4e6848d1c9e8dadc70595c15b5589f8b14aad478
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Subproject commit b58048a5a88ad6184d64f16cfd2c5d63a1952e77
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@ -103,8 +103,6 @@ void RegistersWidget::OnEmulationStopping() {
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vfp_system_registers->child(0)->setText(1, QString{});
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vfp_system_registers->child(0)->setText(1, QString{});
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vfp_system_registers->child(1)->setText(1, QString{});
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vfp_system_registers->child(1)->setText(1, QString{});
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vfp_system_registers->child(2)->setText(1, QString{});
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vfp_system_registers->child(3)->setText(1, QString{});
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setEnabled(false);
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setEnabled(false);
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}
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}
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@ -188,16 +186,12 @@ void RegistersWidget::CreateVFPSystemRegisterChildren() {
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vfp_system_registers->addChild(fpscr);
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vfp_system_registers->addChild(fpscr);
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vfp_system_registers->addChild(fpexc);
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vfp_system_registers->addChild(fpexc);
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vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST"))));
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vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST2"))));
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}
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}
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void RegistersWidget::UpdateVFPSystemRegisterValues() {
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void RegistersWidget::UpdateVFPSystemRegisterValues() {
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// Todo: handle all cores
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// Todo: handle all cores
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const u32 fpscr_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPSCR);
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const u32 fpscr_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPSCR);
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const u32 fpexc_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPEXC);
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const u32 fpexc_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPEXC);
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const u32 fpinst_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST);
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const u32 fpinst2_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST2);
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QTreeWidgetItem* const fpscr = vfp_system_registers->child(0);
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QTreeWidgetItem* const fpscr = vfp_system_registers->child(0);
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fpscr->setText(1, QStringLiteral("0x%1").arg(fpscr_val, 8, 16, QLatin1Char('0')));
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fpscr->setText(1, QStringLiteral("0x%1").arg(fpscr_val, 8, 16, QLatin1Char('0')));
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@ -237,9 +231,4 @@ void RegistersWidget::UpdateVFPSystemRegisterValues() {
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fpexc->child(5)->setText(1, QString::number((fpexc_val >> 28) & 1));
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fpexc->child(5)->setText(1, QString::number((fpexc_val >> 28) & 1));
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fpexc->child(6)->setText(1, QString::number((fpexc_val >> 30) & 1));
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fpexc->child(6)->setText(1, QString::number((fpexc_val >> 30) & 1));
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fpexc->child(7)->setText(1, QString::number((fpexc_val >> 31) & 1));
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fpexc->child(7)->setText(1, QString::number((fpexc_val >> 31) & 1));
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vfp_system_registers->child(2)->setText(
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1, QStringLiteral("0x%1").arg(fpinst_val, 8, 16, QLatin1Char('0')));
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vfp_system_registers->child(3)->setText(
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1, QStringLiteral("0x%1").arg(fpinst2_val, 8, 16, QLatin1Char('0')));
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}
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}
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@ -9,6 +9,7 @@
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#include <atomic>
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#include <atomic>
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#include <cstddef>
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#include <cstddef>
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#include <cstring>
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#include <cstring>
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#include <new>
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#include <type_traits>
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#include <type_traits>
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#include <vector>
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#include <vector>
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#include "common/common_types.h"
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#include "common/common_types.h"
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@ -29,7 +30,7 @@ class RingBuffer {
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static_assert(capacity < std::numeric_limits<std::size_t>::max() / 2 / granularity);
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static_assert(capacity < std::numeric_limits<std::size_t>::max() / 2 / granularity);
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static_assert((capacity & (capacity - 1)) == 0, "capacity must be a power of two");
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static_assert((capacity & (capacity - 1)) == 0, "capacity must be a power of two");
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// Ensure lock-free.
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// Ensure lock-free.
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static_assert(std::atomic<std::size_t>::is_always_lock_free);
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static_assert(std::atomic_size_t::is_always_lock_free);
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public:
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public:
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/// Pushes slots into the ring buffer
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/// Pushes slots into the ring buffer
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@ -100,10 +101,22 @@ public:
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}
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}
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private:
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private:
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// It is important to align the below variables for performance reasons:
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// It is important to separate the below atomics for performance reasons:
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// Having them on the same cache-line would result in false-sharing between them.
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// Having them on the same cache-line would result in false-sharing between them.
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alignas(128) std::atomic<std::size_t> m_read_index{0};
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// TODO: Remove this ifdef whenever clang and GCC support
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alignas(128) std::atomic<std::size_t> m_write_index{0};
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// std::hardware_destructive_interference_size.
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#if defined(_MSC_VER) && _MSC_VER >= 1911
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static constexpr std::size_t padding_size =
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std::hardware_destructive_interference_size - sizeof(std::atomic_size_t);
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#else
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static constexpr std::size_t padding_size = 128 - sizeof(std::atomic_size_t);
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#endif
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std::atomic_size_t m_read_index{0};
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char padding1[padding_size];
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std::atomic_size_t m_write_index{0};
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char padding2[padding_size];
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std::array<T, granularity * capacity> m_data;
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std::array<T, granularity * capacity> m_data;
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};
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};
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@ -9,7 +9,6 @@
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#include "common/microprofile.h"
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#include "common/microprofile.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
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#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/gdbstub/gdbstub.h"
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@ -102,24 +101,9 @@ public:
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}
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}
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void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
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void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
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parent.interpreter_state->Reg = parent.jit->Regs();
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// Should never happen.
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parent.interpreter_state->Cpsr = parent.jit->Cpsr();
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UNREACHABLE_MSG("InterpeterFallback reached with pc = 0x{:08x}, code = 0x{:08x}, num = {}",
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parent.interpreter_state->Reg[15] = pc;
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pc, MemoryReadCode(pc), num_instructions);
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parent.interpreter_state->ExtReg = parent.jit->ExtRegs();
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parent.interpreter_state->VFP[VFP_FPSCR] = parent.jit->Fpscr();
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parent.interpreter_state->NumInstrsToExecute = num_instructions;
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InterpreterMainLoop(parent.interpreter_state.get());
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bool is_thumb = (parent.interpreter_state->Cpsr & (1 << 5)) != 0;
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parent.interpreter_state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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parent.jit->Regs() = parent.interpreter_state->Reg;
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parent.jit->SetCpsr(parent.interpreter_state->Cpsr);
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parent.jit->ExtRegs() = parent.interpreter_state->ExtReg;
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parent.jit->SetFpscr(parent.interpreter_state->VFP[VFP_FPSCR]);
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parent.interpreter_state->ServeBreak();
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}
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}
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void CallSVC(std::uint32_t swi) override {
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void CallSVC(std::uint32_t swi) override {
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@ -135,14 +119,18 @@ public:
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if (GDBStub::IsConnected()) {
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if (GDBStub::IsConnected()) {
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parent.jit->HaltExecution();
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parent.jit->HaltExecution();
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parent.SetPC(pc);
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parent.SetPC(pc);
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Kernel::Thread* thread =
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parent.ServeBreak();
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parent.system.Kernel().GetCurrentThreadManager().GetCurrentThread();
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parent.SaveContext(thread->context);
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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return;
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return;
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}
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}
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break;
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break;
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case Dynarmic::A32::Exception::SendEvent:
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case Dynarmic::A32::Exception::SendEventLocal:
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case Dynarmic::A32::Exception::WaitForInterrupt:
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case Dynarmic::A32::Exception::WaitForEvent:
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case Dynarmic::A32::Exception::Yield:
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case Dynarmic::A32::Exception::PreloadData:
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case Dynarmic::A32::Exception::PreloadDataWithIntentToWrite:
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return;
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}
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}
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ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
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ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
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static_cast<std::size_t>(exception), pc, MemoryReadCode(pc));
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static_cast<std::size_t>(exception), pc, MemoryReadCode(pc));
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@ -161,12 +149,10 @@ public:
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Memory::MemorySystem& memory;
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Memory::MemorySystem& memory;
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};
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};
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ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory,
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ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
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PrivilegeMode initial_mode, u32 id,
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std::shared_ptr<Core::Timing::Timer> timer)
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std::shared_ptr<Core::Timing::Timer> timer)
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: ARM_Interface(id, timer), system(*system), memory(memory),
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: ARM_Interface(id, timer), system(*system), memory(memory),
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cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
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cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
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interpreter_state = std::make_shared<ARMul_State>(system, memory, initial_mode);
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PageTableChanged();
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PageTableChanged();
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}
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}
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@ -182,7 +168,11 @@ void ARM_Dynarmic::Run() {
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}
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}
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void ARM_Dynarmic::Step() {
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void ARM_Dynarmic::Step() {
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cb->InterpreterFallback(jit->Regs()[15], 1);
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jit->Step();
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if (GDBStub::IsConnected()) {
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ServeBreak();
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}
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}
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}
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void ARM_Dynarmic::SetPC(u32 pc) {
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void ARM_Dynarmic::SetPC(u32 pc) {
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@ -210,21 +200,25 @@ void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
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}
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}
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u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
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u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
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if (reg == VFP_FPSCR) {
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switch (reg) {
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case VFP_FPSCR:
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return jit->Fpscr();
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return jit->Fpscr();
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case VFP_FPEXC:
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return fpexc;
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}
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}
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UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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return interpreter_state->VFP[reg];
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}
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}
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void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
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void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
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if (reg == VFP_FPSCR) {
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switch (reg) {
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case VFP_FPSCR:
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jit->SetFpscr(value);
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jit->SetFpscr(value);
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return;
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case VFP_FPEXC:
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fpexc = value;
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return;
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}
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}
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UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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interpreter_state->VFP[reg] = value;
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}
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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u32 ARM_Dynarmic::GetCPSR() const {
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@ -236,11 +230,25 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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}
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}
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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return interpreter_state->CP15[reg];
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switch (reg) {
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case CP15_THREAD_UPRW:
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return cp15_state.cp15_thread_uprw;
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case CP15_THREAD_URO:
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return cp15_state.cp15_thread_uro;
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}
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UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
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}
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}
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void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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interpreter_state->CP15[reg] = value;
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switch (reg) {
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case CP15_THREAD_UPRW:
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cp15_state.cp15_thread_uprw = value;
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return;
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case CP15_THREAD_URO:
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cp15_state.cp15_thread_uro = value;
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return;
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}
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UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
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}
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}
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
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@ -252,7 +260,7 @@ void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
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ASSERT(ctx);
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ASSERT(ctx);
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jit->SaveContext(ctx->ctx);
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jit->SaveContext(ctx->ctx);
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ctx->fpexc = interpreter_state->VFP[VFP_FPEXC];
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ctx->fpexc = fpexc;
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}
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}
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void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
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void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
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@ -260,7 +268,7 @@ void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
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ASSERT(ctx);
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ASSERT(ctx);
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jit->LoadContext(ctx->ctx);
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jit->LoadContext(ctx->ctx);
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interpreter_state->VFP[VFP_FPEXC] = ctx->fpexc;
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fpexc = ctx->fpexc;
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}
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}
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void ARM_Dynarmic::PrepareReschedule() {
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void ARM_Dynarmic::PrepareReschedule() {
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@ -270,11 +278,9 @@ void ARM_Dynarmic::PrepareReschedule() {
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}
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}
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void ARM_Dynarmic::ClearInstructionCache() {
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void ARM_Dynarmic::ClearInstructionCache() {
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// TODO: Clear interpreter cache when appropriate.
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for (const auto& j : jits) {
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for (const auto& j : jits) {
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j.second->ClearCache();
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j.second->ClearCache();
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}
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}
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interpreter_state->instruction_cache.clear();
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}
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}
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void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
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void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
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@ -295,11 +301,18 @@ void ARM_Dynarmic::PageTableChanged() {
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jits.emplace(current_page_table, std::move(new_jit));
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jits.emplace(current_page_table, std::move(new_jit));
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}
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}
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void ARM_Dynarmic::ServeBreak() {
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Kernel::Thread* thread = system.Kernel().GetCurrentThreadManager().GetCurrentThread();
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SaveContext(thread->context);
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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}
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std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
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std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
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||||||
Dynarmic::A32::UserConfig config;
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Dynarmic::A32::UserConfig config;
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config.callbacks = cb.get();
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config.callbacks = cb.get();
|
||||||
config.page_table = ¤t_page_table->pointers;
|
config.page_table = ¤t_page_table->pointers;
|
||||||
config.coprocessors[15] = std::make_shared<DynarmicCP15>(interpreter_state);
|
config.coprocessors[15] = std::make_shared<DynarmicCP15>(cp15_state);
|
||||||
config.define_unpredictable_behaviour = true;
|
config.define_unpredictable_behaviour = true;
|
||||||
return std::make_unique<Dynarmic::A32::Jit>(config);
|
return std::make_unique<Dynarmic::A32::Jit>(config);
|
||||||
}
|
}
|
||||||
|
|
|
@ -9,7 +9,7 @@
|
||||||
#include <dynarmic/A32/a32.h>
|
#include <dynarmic/A32/a32.h>
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
#include "core/arm/arm_interface.h"
|
#include "core/arm/arm_interface.h"
|
||||||
#include "core/arm/skyeye_common/armstate.h"
|
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
|
||||||
|
|
||||||
namespace Memory {
|
namespace Memory {
|
||||||
struct PageTable;
|
struct PageTable;
|
||||||
|
@ -24,8 +24,8 @@ class DynarmicUserCallbacks;
|
||||||
|
|
||||||
class ARM_Dynarmic final : public ARM_Interface {
|
class ARM_Dynarmic final : public ARM_Interface {
|
||||||
public:
|
public:
|
||||||
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, PrivilegeMode initial_mode,
|
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
|
||||||
u32 id, std::shared_ptr<Core::Timing::Timer> timer);
|
std::shared_ptr<Core::Timing::Timer> timer);
|
||||||
~ARM_Dynarmic() override;
|
~ARM_Dynarmic() override;
|
||||||
|
|
||||||
void Run() override;
|
void Run() override;
|
||||||
|
@ -55,14 +55,18 @@ public:
|
||||||
void PageTableChanged() override;
|
void PageTableChanged() override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
void ServeBreak();
|
||||||
|
|
||||||
friend class DynarmicUserCallbacks;
|
friend class DynarmicUserCallbacks;
|
||||||
Core::System& system;
|
Core::System& system;
|
||||||
Memory::MemorySystem& memory;
|
Memory::MemorySystem& memory;
|
||||||
std::unique_ptr<DynarmicUserCallbacks> cb;
|
std::unique_ptr<DynarmicUserCallbacks> cb;
|
||||||
std::unique_ptr<Dynarmic::A32::Jit> MakeJit();
|
std::unique_ptr<Dynarmic::A32::Jit> MakeJit();
|
||||||
|
|
||||||
|
u32 fpexc = 0;
|
||||||
|
CP15State cp15_state;
|
||||||
|
|
||||||
Dynarmic::A32::Jit* jit = nullptr;
|
Dynarmic::A32::Jit* jit = nullptr;
|
||||||
Memory::PageTable* current_page_table = nullptr;
|
Memory::PageTable* current_page_table = nullptr;
|
||||||
std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::A32::Jit>> jits;
|
std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::A32::Jit>> jits;
|
||||||
std::shared_ptr<ARMul_State> interpreter_state;
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -10,14 +10,14 @@ using Callback = Dynarmic::A32::Coprocessor::Callback;
|
||||||
using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
|
using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
|
||||||
using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
|
using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
|
||||||
|
|
||||||
DynarmicCP15::DynarmicCP15(const std::shared_ptr<ARMul_State>& state) : interpreter_state(state) {}
|
DynarmicCP15::DynarmicCP15(CP15State& state) : state(state) {}
|
||||||
|
|
||||||
DynarmicCP15::~DynarmicCP15() = default;
|
DynarmicCP15::~DynarmicCP15() = default;
|
||||||
|
|
||||||
boost::optional<Callback> DynarmicCP15::CompileInternalOperation(bool two, unsigned opc1,
|
std::optional<Callback> DynarmicCP15::CompileInternalOperation(bool two, unsigned opc1,
|
||||||
CoprocReg CRd, CoprocReg CRn,
|
CoprocReg CRd, CoprocReg CRn,
|
||||||
CoprocReg CRm, unsigned opc2) {
|
CoprocReg CRm, unsigned opc2) {
|
||||||
return boost::none;
|
return std::nullopt;
|
||||||
}
|
}
|
||||||
|
|
||||||
CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
||||||
|
@ -26,31 +26,31 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) {
|
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) {
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_FLUSH_PREFETCH_BUFFER];
|
return &state.cp15_flush_prefetch_buffer;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) {
|
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) {
|
||||||
switch (opc2) {
|
switch (opc2) {
|
||||||
case 4:
|
case 4:
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_DATA_SYNC_BARRIER];
|
return &state.cp15_data_sync_barrier;
|
||||||
case 5:
|
case 5:
|
||||||
// This is a dummy write, we ignore the value written here.
|
// This is a dummy write, we ignore the value written here.
|
||||||
return &interpreter_state->CP15[CP15_DATA_MEMORY_BARRIER];
|
return &state.cp15_data_memory_barrier;
|
||||||
default:
|
default:
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) {
|
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) {
|
||||||
return &interpreter_state->CP15[CP15_THREAD_UPRW];
|
return &state.cp15_thread_uprw;
|
||||||
}
|
}
|
||||||
|
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
|
|
||||||
CallbackOrAccessTwoWords DynarmicCP15::CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) {
|
CallbackOrAccessTwoWords DynarmicCP15::CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) {
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
|
|
||||||
CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
||||||
|
@ -60,29 +60,27 @@ CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1,
|
||||||
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) {
|
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) {
|
||||||
switch (opc2) {
|
switch (opc2) {
|
||||||
case 2:
|
case 2:
|
||||||
return &interpreter_state->CP15[CP15_THREAD_UPRW];
|
return &state.cp15_thread_uprw;
|
||||||
case 3:
|
case 3:
|
||||||
return &interpreter_state->CP15[CP15_THREAD_URO];
|
return &state.cp15_thread_uro;
|
||||||
default:
|
default:
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
|
|
||||||
CallbackOrAccessTwoWords DynarmicCP15::CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) {
|
CallbackOrAccessTwoWords DynarmicCP15::CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) {
|
||||||
return boost::blank{};
|
return std::monostate{};
|
||||||
}
|
}
|
||||||
|
|
||||||
boost::optional<Callback> DynarmicCP15::CompileLoadWords(bool two, bool long_transfer,
|
std::optional<Callback> DynarmicCP15::CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
|
||||||
CoprocReg CRd,
|
std::optional<u8> option) {
|
||||||
boost::optional<u8> option) {
|
return std::nullopt;
|
||||||
return boost::none;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
boost::optional<Callback> DynarmicCP15::CompileStoreWords(bool two, bool long_transfer,
|
std::optional<Callback> DynarmicCP15::CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
|
||||||
CoprocReg CRd,
|
std::optional<u8> option) {
|
||||||
boost::optional<u8> option) {
|
return std::nullopt;
|
||||||
return boost::none;
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -8,16 +8,22 @@
|
||||||
#include <dynarmic/A32/coprocessor.h>
|
#include <dynarmic/A32/coprocessor.h>
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
|
|
||||||
struct ARMul_State;
|
struct CP15State {
|
||||||
|
u32 cp15_thread_uprw = 0;
|
||||||
|
u32 cp15_thread_uro = 0;
|
||||||
|
u32 cp15_flush_prefetch_buffer = 0; ///< dummy value
|
||||||
|
u32 cp15_data_sync_barrier = 0; ///< dummy value
|
||||||
|
u32 cp15_data_memory_barrier = 0; ///< dummy value
|
||||||
|
};
|
||||||
|
|
||||||
class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
|
class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
|
||||||
public:
|
public:
|
||||||
using CoprocReg = Dynarmic::A32::CoprocReg;
|
using CoprocReg = Dynarmic::A32::CoprocReg;
|
||||||
|
|
||||||
explicit DynarmicCP15(const std::shared_ptr<ARMul_State>&);
|
explicit DynarmicCP15(CP15State&);
|
||||||
~DynarmicCP15() override;
|
~DynarmicCP15() override;
|
||||||
|
|
||||||
boost::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
|
std::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
|
||||||
CoprocReg CRn, CoprocReg CRm,
|
CoprocReg CRn, CoprocReg CRm,
|
||||||
unsigned opc2) override;
|
unsigned opc2) override;
|
||||||
CallbackOrAccessOneWord CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
CallbackOrAccessOneWord CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
|
||||||
|
@ -26,11 +32,11 @@ public:
|
||||||
CallbackOrAccessOneWord CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn, CoprocReg CRm,
|
CallbackOrAccessOneWord CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn, CoprocReg CRm,
|
||||||
unsigned opc2) override;
|
unsigned opc2) override;
|
||||||
CallbackOrAccessTwoWords CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) override;
|
CallbackOrAccessTwoWords CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) override;
|
||||||
boost::optional<Callback> CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
|
std::optional<Callback> CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
|
||||||
boost::optional<u8> option) override;
|
std::optional<u8> option) override;
|
||||||
boost::optional<Callback> CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
|
std::optional<Callback> CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
|
||||||
boost::optional<u8> option) override;
|
std::optional<u8> option) override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
std::shared_ptr<ARMul_State> interpreter_state;
|
CP15State& state;
|
||||||
};
|
};
|
||||||
|
|
|
@ -267,7 +267,7 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window, u32 system_mo
|
||||||
#ifdef ARCHITECTURE_x86_64
|
#ifdef ARCHITECTURE_x86_64
|
||||||
for (std::size_t i = 0; i < num_cores; ++i) {
|
for (std::size_t i = 0; i < num_cores; ++i) {
|
||||||
cpu_cores.push_back(
|
cpu_cores.push_back(
|
||||||
std::make_shared<ARM_Dynarmic>(this, *memory, USER32MODE, i, timing->GetTimer(i)));
|
std::make_shared<ARM_Dynarmic>(this, *memory, i, timing->GetTimer(i)));
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
for (std::size_t i = 0; i < num_cores; ++i) {
|
for (std::size_t i = 0; i < num_cores; ++i) {
|
||||||
|
|
Loading…
Reference in a new issue