diff --git a/src/frontend/A32/decoder/thumb16.h b/src/frontend/A32/decoder/thumb16.h
index e93a7556..87662396 100644
--- a/src/frontend/A32/decoder/thumb16.h
+++ b/src/frontend/A32/decoder/thumb16.h
@@ -116,6 +116,7 @@ std::optional<std::reference_wrapper<const Thumb16Matcher<V>>> DecodeThumb16(u16
         // Branch instructions
         INST(&V::thumb16_BX,             "BX",                       "010001110mmmm000"), // v4T
         INST(&V::thumb16_BLX_reg,        "BLX (reg)",                "010001111mmmm000"), // v5T
+        INST(&V::thumb16_CBZ_CBNZ,       "CBZ/CBNZ",                 "1011o0i1iiiiinnn"), // v6T2
         INST(&V::thumb16_UDF,            "UDF",                      "11011110--------"),
         INST(&V::thumb16_SVC,            "SVC",                      "11011111xxxxxxxx"),
         INST(&V::thumb16_B_t1,           "B (T1)",                   "1101ccccvvvvvvvv"),
diff --git a/src/frontend/A32/disassembler/disassembler_thumb.cpp b/src/frontend/A32/disassembler/disassembler_thumb.cpp
index a53475db..12c444da 100644
--- a/src/frontend/A32/disassembler/disassembler_thumb.cpp
+++ b/src/frontend/A32/disassembler/disassembler_thumb.cpp
@@ -337,6 +337,13 @@ public:
         return fmt::format("blx {}", m);
     }
 
+    std::string thumb16_CBZ_CBNZ(bool nonzero, Imm<1> i, Imm<5> imm5, Reg n) {
+        const char* const name = nonzero ? "cbnz" : "cbz";
+        const u32 imm = concatenate(i, imm5, Imm<1>{0}).ZeroExtend();
+
+        return fmt::format("{} {}, #{}", name, n, imm);
+    }
+
     std::string thumb16_UDF() {
         return fmt::format("udf");
     }
diff --git a/src/frontend/A32/translate/translate_thumb.cpp b/src/frontend/A32/translate/translate_thumb.cpp
index fae7ccf5..f008e493 100644
--- a/src/frontend/A32/translate/translate_thumb.cpp
+++ b/src/frontend/A32/translate/translate_thumb.cpp
@@ -884,6 +884,29 @@ struct ThumbTranslatorVisitor final {
         return true;
     }
 
+    // CB{N}Z <Rn>, <label>
+    bool thumb16_CBZ_CBNZ(bool nonzero, Imm<1> i, Imm<5> imm5, Reg n) {
+        const u32 imm = concatenate(i, imm5, Imm<1>{0}).ZeroExtend();
+        const IR::U32 rn = ir.GetRegister(n);
+
+        ir.SetCheckBit(ir.IsZero(rn));
+
+        const auto [cond_pass, cond_fail] = [this, imm, nonzero] {
+            const u32 target = ir.PC() + imm;
+            const auto skip = IR::Term::LinkBlock{ir.current_location.AdvancePC(2)};
+            const auto branch = IR::Term::LinkBlock{ir.current_location.AdvancePC(target)};
+
+            if (nonzero) {
+                return std::make_pair(skip, branch);
+            } else {
+                return std::make_pair(branch, skip);
+            }
+        }();
+
+         ir.SetTerm(IR::Term::CheckBit{cond_pass, cond_fail});
+        return false;
+    }
+
     bool thumb16_UDF() {
         return InterpretThisInstruction();
     }
diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp
index fe72429c..d8900d55 100644
--- a/tests/A32/fuzz_thumb.cpp
+++ b/tests/A32/fuzz_thumb.cpp
@@ -291,6 +291,7 @@ TEST_CASE("Fuzz Thumb instructions set 2 (affects PC)", "[JitX64][Thumb]") {
                          const u32 c = Dynarmic::Common::Bits<9, 12>(inst);
                          return c < 0b1110; // Don't want SWI or undefined instructions.
                      }),
+        ThumbInstGen("1011o0i1iiiiinnn"), // CBZ/CBNZ
         ThumbInstGen("10110110011x0xxx"), // CPS
 
         // TODO: We currently have no control over the generated