From 0692f1d40e468c7ef26e637e324a6eca313de03d Mon Sep 17 00:00:00 2001
From: Merry <git@mary.rs>
Date: Sat, 30 Jul 2022 12:32:11 +0100
Subject: [PATCH] emit_arm64_data_processing: EmitAddSub: Handle zero immediate
 w/ flag output

---
 .../backend/arm64/emit_arm64_data_processing.cpp     | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
index bd37b4c0..b03423f8 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
@@ -713,8 +713,16 @@ static void EmitAddSub(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst*
                 RegAlloc::Realize(Rresult, Ra);
                 ctx.reg_alloc.ReadWriteFlags(args[2], nzcv_inst);
 
-                code.MOV(Rscratch0<bitsize>(), imm);
-                sub ? code.SBCS(Rresult, Ra, Rscratch0<bitsize>()) : code.ADCS(Rresult, Ra, Rscratch0<bitsize>());
+                if (imm == 0) {
+                    if constexpr (bitsize == 32) {
+                        sub ? code.SBCS(Rresult, Ra, WZR) : code.ADCS(Rresult, Ra, WZR);
+                    } else {
+                        sub ? code.SBCS(Rresult, Ra, XZR) : code.ADCS(Rresult, Ra, XZR);
+                    }
+                } else {
+                    code.MOV(Rscratch0<bitsize>(), imm);
+                    sub ? code.SBCS(Rresult, Ra, Rscratch0<bitsize>()) : code.ADCS(Rresult, Ra, Rscratch0<bitsize>());
+                }
             }
         } else {
             auto Rb = ctx.reg_alloc.ReadReg<bitsize>(args[1]);