mirror of
https://github.com/CTCaer/hekate.git
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316 lines
8.9 KiB
C
316 lines
8.9 KiB
C
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/*
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* eMMC BIS driver for Nintendo Switch
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*
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* Copyright (c) 2019-2020 shchmue
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* Copyright (c) 2019-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include <memory_map.h>
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#include <mem/heap.h>
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#include <sec/se.h>
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#include <storage/emmc.h>
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#include <storage/sd.h>
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#include <storage/sdmmc.h>
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#include <utils/types.h>
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#define BIS_CLUSTER_SECTORS 32
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#define BIS_CLUSTER_SIZE 16384
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#define BIS_CACHE_MAX_ENTRIES 16384
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#define BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY -1
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typedef struct _cluster_cache_t
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{
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u32 cluster_idx; // Index of the cluster in the partition.
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bool dirty; // Has been modified without write-back flag.
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u8 data[BIS_CLUSTER_SIZE]; // The cached cluster itself. Aligned to 8 bytes for DMA engine.
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} cluster_cache_t;
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typedef struct _bis_cache_t
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{
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bool full;
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bool enabled;
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u32 dirty_cnt;
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u32 top_idx;
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u8 dma_buff[BIS_CLUSTER_SIZE]; // Aligned to 8 bytes for DMA engine.
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cluster_cache_t clusters[];
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} bis_cache_t;
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static u8 ks_crypt = 0;
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static u8 ks_tweak = 0;
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static u32 emu_offset = 0;
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static emmc_part_t *system_part = NULL;
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static u32 *cache_lookup_tbl = (u32 *)NX_BIS_LOOKUP_ADDR;
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static bis_cache_t *bis_cache = (bis_cache_t *)NX_BIS_CACHE_ADDR;
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static int nx_emmc_bis_write_block(u32 sector, u32 count, void *buff, bool flush)
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{
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if (!system_part)
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return 3; // Not ready.
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int res;
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u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 aligned_sector = cluster * BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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u32 lookup_idx = cache_lookup_tbl[cluster];
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bool is_cached = lookup_idx != (u32)BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY;
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// Write to cached cluster.
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if (is_cached)
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{
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if (buff)
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memcpy(bis_cache->clusters[lookup_idx].data + sector_in_cluster * EMMC_BLOCKSIZE, buff, count * EMMC_BLOCKSIZE);
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else
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buff = bis_cache->clusters[lookup_idx].data;
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if (!bis_cache->clusters[lookup_idx].dirty)
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bis_cache->dirty_cnt++;
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bis_cache->clusters[lookup_idx].dirty = true;
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if (!flush)
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return 0; // Success.
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// Reset args to trigger a full cluster flush to emmc.
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sector_in_cluster = 0;
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sector = aligned_sector;
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count = BIS_CLUSTER_SECTORS;
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}
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// Encrypt cluster.
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if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, ENCRYPT, cluster, tweak, true, sector_in_cluster, bis_cache->dma_buff, buff, count * EMMC_BLOCKSIZE))
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return 1; // Encryption error.
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// If not reading from cache, do a regular read and decrypt.
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if (!emu_offset)
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res = emmc_part_write(system_part, sector, count, bis_cache->dma_buff);
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else
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res = sdmmc_storage_write(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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// Mark cache entry not dirty if write succeeds.
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if (is_cached)
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{
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bis_cache->clusters[lookup_idx].dirty = false;
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bis_cache->dirty_cnt--;
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}
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return 0; // Success.
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}
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static void _nx_emmc_bis_cluster_cache_init(bool enable_cache)
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{
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u32 cache_lookup_tbl_size = (system_part->lba_end - system_part->lba_start + 1) / BIS_CLUSTER_SECTORS * sizeof(*cache_lookup_tbl);
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// Clear cache header.
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memset(bis_cache, 0, sizeof(bis_cache_t));
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// Clear cluster lookup table.
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memset(cache_lookup_tbl, BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY, cache_lookup_tbl_size);
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// Enable cache.
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bis_cache->enabled = enable_cache;
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}
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static void _nx_emmc_bis_flush_cache()
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{
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if (!bis_cache->enabled || !bis_cache->dirty_cnt)
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return;
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for (u32 i = 0; i < bis_cache->top_idx && bis_cache->dirty_cnt; i++)
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{
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if (bis_cache->clusters[i].dirty) {
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nx_emmc_bis_write_block(bis_cache->clusters[i].cluster_idx * BIS_CLUSTER_SECTORS, BIS_CLUSTER_SECTORS, NULL, true);
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bis_cache->dirty_cnt--;
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}
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}
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_nx_emmc_bis_cluster_cache_init(true);
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}
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static int nx_emmc_bis_read_block_normal(u32 sector, u32 count, void *buff)
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{
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static u32 prev_cluster = -1;
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static u32 prev_sector = 0;
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static u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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int res;
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bool regen_tweak = true;
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u32 tweak_exp = 0;
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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// If not reading from cache, do a regular read and decrypt.
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if (!emu_offset)
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res = emmc_part_read(system_part, sector, count, bis_cache->dma_buff);
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else
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res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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if (prev_cluster != cluster) // Sector in different cluster than last read.
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{
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prev_cluster = cluster;
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tweak_exp = sector_in_cluster;
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}
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else if (sector > prev_sector) // Sector in same cluster and past last sector.
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{
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// Calculates the new tweak using the saved one, reducing expensive _gf256_mul_x_le calls.
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tweak_exp = sector - prev_sector - 1;
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regen_tweak = false;
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}
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else // Sector in same cluster and before or same as last sector.
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tweak_exp = sector_in_cluster;
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// Maximum one cluster (1 XTS crypto block 16KB).
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if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, DECRYPT, prev_cluster, tweak, regen_tweak, tweak_exp, buff, bis_cache->dma_buff, count * EMMC_BLOCKSIZE))
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return 1; // R/W error.
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prev_sector = sector + count - 1;
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return 0; // Success.
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}
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static int nx_emmc_bis_read_block_cached(u32 sector, u32 count, void *buff)
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{
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int res;
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u8 cache_tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 cluster_sector = cluster * BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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u32 lookup_idx = cache_lookup_tbl[cluster];
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// Read from cached cluster.
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if (lookup_idx != (u32)BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY)
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{
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memcpy(buff, bis_cache->clusters[lookup_idx].data + sector_in_cluster * EMMC_BLOCKSIZE, count * EMMC_BLOCKSIZE);
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return 0; // Success.
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}
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// Flush cache if full.
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if (bis_cache->top_idx >= BIS_CACHE_MAX_ENTRIES)
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_nx_emmc_bis_flush_cache();
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// Set new cached cluster parameters.
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bis_cache->clusters[bis_cache->top_idx].cluster_idx = cluster;
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bis_cache->clusters[bis_cache->top_idx].dirty = false;
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cache_lookup_tbl[cluster] = bis_cache->top_idx;
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// Read the whole cluster the sector resides in.
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if (!emu_offset)
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res = emmc_part_read(system_part, cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
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else
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res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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// Decrypt cluster.
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if (!se_aes_xts_crypt_sec_nx(ks_tweak, ks_crypt, DECRYPT, cluster, cache_tweak, true, 0, bis_cache->dma_buff, bis_cache->dma_buff, BIS_CLUSTER_SIZE))
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return 1; // Decryption error.
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// Copy to cluster cache.
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memcpy(bis_cache->clusters[bis_cache->top_idx].data, bis_cache->dma_buff, BIS_CLUSTER_SIZE);
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memcpy(buff, bis_cache->dma_buff + sector_in_cluster * EMMC_BLOCKSIZE, count * EMMC_BLOCKSIZE);
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// Increment cache count.
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bis_cache->top_idx++;
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return 0; // Success.
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}
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static int nx_emmc_bis_read_block(u32 sector, u32 count, void *buff)
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{
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if (!system_part)
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return 3; // Not ready.
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if (bis_cache->enabled)
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return nx_emmc_bis_read_block_cached(sector, count, buff);
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else
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return nx_emmc_bis_read_block_normal(sector, count, buff);
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}
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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{
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u8 *buf = (u8 *)buff;
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u32 curr_sct = sector;
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while (count)
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{
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u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
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if (nx_emmc_bis_read_block(curr_sct, sct_cnt, buf))
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return 0;
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count -= sct_cnt;
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curr_sct += sct_cnt;
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buf += sct_cnt * EMMC_BLOCKSIZE;
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}
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return 1;
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}
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int nx_emmc_bis_write(u32 sector, u32 count, void *buff)
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{
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u8 *buf = (u8 *)buff;
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u32 curr_sct = sector;
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while (count)
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{
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u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
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if (nx_emmc_bis_write_block(curr_sct, sct_cnt, buf, false))
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return 0;
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count -= sct_cnt;
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curr_sct += sct_cnt;
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buf += sct_cnt * EMMC_BLOCKSIZE;
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}
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return 1;
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}
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void nx_emmc_bis_init(emmc_part_t *part, bool enable_cache, u32 emummc_offset)
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{
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system_part = part;
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emu_offset = emummc_offset;
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_nx_emmc_bis_cluster_cache_init(enable_cache);
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if (!strcmp(part->name, "PRODINFO") || !strcmp(part->name, "PRODINFOF"))
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{
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ks_crypt = 0;
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ks_tweak = 1;
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}
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else if (!strcmp(part->name, "SAFE"))
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{
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ks_crypt = 2;
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ks_tweak = 3;
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}
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else if (!strcmp(part->name, "SYSTEM") || !strcmp(part->name, "USER"))
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{
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ks_crypt = 4;
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ks_tweak = 5;
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}
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else
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system_part = NULL;
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}
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void nx_emmc_bis_end()
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{
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_nx_emmc_bis_flush_cache();
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system_part = NULL;
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}
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