1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-26 19:52:11 +00:00
hekate/bootloader/soc/uart.h

87 lines
2.1 KiB
C
Raw Normal View History

2018-03-27 00:04:16 +01:00
/*
* Copyright (c) 2018 naehrwert
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
2018-03-07 01:11:46 +00:00
#ifndef _UART_H_
#define _UART_H_
2018-08-13 09:58:24 +01:00
#include "../utils/types.h"
2018-03-07 01:11:46 +00:00
#define UART_A 0
#define UART_B 1
#define UART_C 2
2019-09-09 14:56:37 +01:00
#define UART_D 3
#define UART_E 4
2018-03-07 01:11:46 +00:00
#define BAUD_115200 115200
2018-12-07 20:00:19 +00:00
#define UART_TX_IDLE 0x1
#define UART_RX_IDLE 0x2
2018-12-16 14:52:38 +00:00
#define UART_TX_FIFO_FULL 0x100
#define UART_RX_FIFO_EMPTY 0x200
2019-09-09 14:56:37 +01:00
#define UART_INVERT_RXD 0x01
#define UART_INVERT_TXD 0x02
#define UART_INVERT_CTS 0x04
#define UART_INVERT_RTS 0x08
#define UART_IER_DLAB_IE_EORD 0x20
2018-12-07 20:00:19 +00:00
#define UART_LCR_DLAB 0x80
2019-09-09 14:56:37 +01:00
#define UART_LCR_STOP 0x4
2018-12-07 20:00:19 +00:00
#define UART_LCR_WORD_LENGTH_8 0x3
2019-09-09 14:56:37 +01:00
2018-12-07 20:00:19 +00:00
#define UART_LSR_RDR 0x1
#define UART_LSR_THRE 0x20
#define UART_LSR_TMTY 0x40
2019-09-09 14:56:37 +01:00
#define UART_LSR_FIFOE 0x80
2018-12-07 20:00:19 +00:00
#define UART_IIR_FCR_TX_CLR 0x4
#define UART_IIR_FCR_RX_CLR 0x2
#define UART_IIR_FCR_EN_FIFO 0x1
2018-03-07 01:11:46 +00:00
2019-09-09 14:56:37 +01:00
#define UART_MCR_RTS 0x2
#define UART_MCR_DTR 0x1
2018-03-07 01:11:46 +00:00
typedef struct _uart_t
{
2018-03-15 21:14:09 +00:00
/* 0x00 */ vu32 UART_THR_DLAB;
/* 0x04 */ vu32 UART_IER_DLAB;
/* 0x08 */ vu32 UART_IIR_FCR;
/* 0x0C */ vu32 UART_LCR;
/* 0x10 */ vu32 UART_MCR;
/* 0x14 */ vu32 UART_LSR;
/* 0x18 */ vu32 UART_MSR;
/* 0x1C */ vu32 UART_SPR;
/* 0x20 */ vu32 UART_IRDA_CSR;
/* 0x24 */ vu32 UART_RX_FIFO_CFG;
/* 0x28 */ vu32 UART_MIE;
/* 0x2C */ vu32 UART_VENDOR_STATUS;
/* 0x30 */ u8 _pad_30[0xC];
/* 0x3C */ vu32 UART_ASR;
2018-03-07 01:11:46 +00:00
} uart_t;
void uart_init(u32 idx, u32 baud);
void uart_wait_idle(u32 idx, u32 which);
void uart_send(u32 idx, const u8 *buf, u32 len);
u32 uart_recv(u32 idx, u8 *buf, u32 len);
void uart_invert(u32 idx, bool enable, u32 invert_mask);
u32 uart_get_IIR(u32 idx);
void uart_set_IIR(u32 idx);
void uart_empty_fifo(u32 idx, u32 which);
2018-03-07 01:11:46 +00:00
#endif