2018-05-01 06:15:48 +01:00
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/*
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* Copyright (c) 2018 naehrwert
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "hos.h"
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#include "sdmmc.h"
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#include "nx_emmc.h"
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#include "t210.h"
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#include "se.h"
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#include "se_t210.h"
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#include "pmc.h"
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#include "cluster.h"
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#include "heap.h"
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#include "tsec.h"
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#include "pkg2.h"
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#include "nx_emmc.h"
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#include "util.h"
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#include "pkg1.h"
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#include "pkg2.h"
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#include "ff.h"
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2018-05-13 02:13:17 +01:00
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#include "gfx.h"
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2018-05-01 06:15:48 +01:00
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extern gfx_ctxt_t gfx_ctxt;
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extern gfx_con_t gfx_con;
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2018-06-01 17:02:13 +01:00
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//#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)
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#define DPRINTF(...)
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2018-05-13 02:13:17 +01:00
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enum KB_FIRMWARE_VERSION {
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KB_FIRMWARE_VERSION_100_200 = 0,
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KB_FIRMWARE_VERSION_300 = 1,
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KB_FIRMWARE_VERSION_301 = 2,
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KB_FIRMWARE_VERSION_400 = 3,
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KB_FIRMWARE_VERSION_500 = 4,
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KB_FIRMWARE_VERSION_MAX
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};
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2018-05-01 06:15:48 +01:00
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#define NUM_KEYBLOB_KEYS 5
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static const u8 keyblob_keyseeds[NUM_KEYBLOB_KEYS][0x10] = {
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{ 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 }, //1.0.0
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{ 0x0C, 0x25, 0x61, 0x5D, 0x68, 0x4C, 0xEB, 0x42, 0x1C, 0x23, 0x79, 0xEA, 0x82, 0x25, 0x12, 0xAC }, //3.0.0
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{ 0x33, 0x76, 0x85, 0xEE, 0x88, 0x4A, 0xAE, 0x0A, 0xC2, 0x8A, 0xFD, 0x7D, 0x63, 0xC0, 0x43, 0x3B }, //3.0.1
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{ 0x2D, 0x1F, 0x48, 0x80, 0xED, 0xEC, 0xED, 0x3E, 0x3C, 0xF2, 0x48, 0xB5, 0x65, 0x7D, 0xF7, 0xBE }, //4.0.0
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{ 0xBB, 0x5A, 0x01, 0xF9, 0x88, 0xAF, 0xF5, 0xFC, 0x6C, 0xFF, 0x07, 0x9E, 0x13, 0x3C, 0x39, 0x80 } //5.0.0
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};
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static const u8 cmac_keyseed[0x10] =
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{ 0x59, 0xC7, 0xFB, 0x6F, 0xBE, 0x9B, 0xBE, 0x87, 0x65, 0x6B, 0x15, 0xC0, 0x53, 0x73, 0x36, 0xA5 };
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2018-05-13 02:13:17 +01:00
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static const u8 master_keyseed_retail[0x10] =
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2018-05-01 06:15:48 +01:00
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{ 0xD8, 0xA2, 0x41, 0x0A, 0xC6, 0xC5, 0x90, 0x01, 0xC6, 0x1D, 0x6A, 0x26, 0x7C, 0x51, 0x3F, 0x3C };
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2018-05-13 02:13:17 +01:00
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static const u8 console_keyseed[0x10] =
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2018-05-01 06:15:48 +01:00
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{ 0x4F, 0x02, 0x5F, 0x0E, 0xB6, 0x6D, 0x11, 0x0E, 0xDC, 0x32, 0x7D, 0x41, 0x86, 0xC2, 0xF4, 0x78 };
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static const u8 key8_keyseed[] =
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{ 0xFB, 0x8B, 0x6A, 0x9C, 0x79, 0x00, 0xC8, 0x49, 0xEF, 0xD2, 0x4D, 0x85, 0x4D, 0x30, 0xA0, 0xC7 };
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2018-05-13 02:13:17 +01:00
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static const u8 master_keyseed_4xx[0x10] =
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2018-05-04 08:15:29 +01:00
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{ 0x2D, 0xC1, 0xF4, 0x8D, 0xF3, 0x5B, 0x69, 0x33, 0x42, 0x10, 0xAC, 0x65, 0xDA, 0x90, 0x46, 0x66 };
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2018-05-13 02:13:17 +01:00
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static const u8 console_keyseed_4xx[0x10] =
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2018-05-04 08:15:29 +01:00
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{ 0x0C, 0x91, 0x09, 0xDB, 0x93, 0x93, 0x07, 0x81, 0x07, 0x3C, 0xC4, 0x16, 0x22, 0x7C, 0x6C, 0x28 };
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2018-05-01 06:15:48 +01:00
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static void _se_lock()
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{
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for (u32 i = 0; i < 16; i++)
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se_key_acc_ctrl(i, 0x15);
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for (u32 i = 0; i < 2; i++)
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se_rsa_acc_ctrl(i, 1);
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SE(0x4) = 0; //Make this reg secure only.
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SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET) = 0; //Make all key access regs secure only.
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SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET) = 0; //Make all rsa access regs secure only.
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SE(SE_SECURITY_0) &= 0xFFFFFFFB; //Make access lock regs secure only.
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//This is useful for documenting the bits in the SE config registers, so we can keep it around.
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/*gfx_printf(&gfx_con, "SE(SE_SECURITY_0) = %08X\n", SE(SE_SECURITY_0));
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gfx_printf(&gfx_con, "SE(0x4) = %08X\n", SE(0x4));
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gfx_printf(&gfx_con, "SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET) = %08X\n", SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET));
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gfx_printf(&gfx_con, "SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET) = %08X\n", SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET));
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for(u32 i = 0; i < 16; i++)
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gfx_printf(&gfx_con, "%02X ", SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + i * 4) & 0xFF);
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gfx_putc(&gfx_con, '\n');
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for(u32 i = 0; i < 2; i++)
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gfx_printf(&gfx_con, "%02X ", SE(SE_RSA_KEYTABLE_ACCESS_REG_OFFSET + i * 4) & 0xFF);
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gfx_putc(&gfx_con, '\n');
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gfx_hexdump(&gfx_con, SE_BASE, (void *)SE_BASE, 0x400);*/
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}
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2018-05-04 08:15:29 +01:00
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// <-- key derivation algorithm
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2018-05-13 02:13:17 +01:00
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int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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2018-05-01 06:15:48 +01:00
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{
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2018-05-13 02:13:17 +01:00
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u8 tmp[0x10];
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2018-05-01 06:15:48 +01:00
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2018-05-13 02:13:17 +01:00
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se_key_acc_ctrl(0x0D, 0x15);
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se_key_acc_ctrl(0x0E, 0x15);
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2018-05-01 06:15:48 +01:00
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//Get TSEC key.
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if (tsec_query(tmp, 1, tsec_fw) < 0)
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return 0;
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2018-05-13 02:13:17 +01:00
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se_aes_key_set(0x0D, tmp, 0x10);
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//Derive keyblob keys from TSEC+SBK.
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se_aes_crypt_block_ecb(0x0D, 0x00, tmp, keyblob_keyseeds[0]);
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se_aes_unwrap_key(0x0F, 0x0E, tmp);
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se_aes_crypt_block_ecb(0xD, 0x00, tmp, keyblob_keyseeds[kb]);
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se_aes_unwrap_key(0x0D, 0x0E, tmp);
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// Clear SBK
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se_aes_key_clear(0x0E);
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2018-05-01 06:15:48 +01:00
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//TODO: verify keyblob CMAC.
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//se_aes_unwrap_key(11, 13, cmac_keyseed);
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//se_aes_cmac(tmp, 0x10, 11, keyblob + 0x10, 0xA0);
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//if (!memcmp(keyblob, tmp, 0x10))
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// return 0;
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2018-05-13 02:13:17 +01:00
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se_aes_crypt_block_ecb(0x0D, 0, tmp, cmac_keyseed);
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se_aes_unwrap_key(0x0B, 0x0D, cmac_keyseed);
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2018-05-04 08:15:29 +01:00
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2018-05-13 02:13:17 +01:00
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//Decrypt keyblob and set keyslots.
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se_aes_crypt_ctr(0x0D, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
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se_aes_key_set(0x0B, keyblob + 0x20 + 0x80, 0x10); // package1 key
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se_aes_key_set(0x0C, keyblob + 0x20, 0x10);
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se_aes_key_set(0x0D, keyblob + 0x20, 0x10);
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2018-05-04 08:15:29 +01:00
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2018-05-13 02:13:17 +01:00
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se_aes_crypt_block_ecb(0x0C, 0, tmp, master_keyseed_retail);
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2018-05-04 08:15:29 +01:00
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2018-05-13 02:13:17 +01:00
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switch (kb) {
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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2018-05-29 00:11:22 +01:00
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case KB_FIRMWARE_VERSION_301:
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2018-05-13 02:13:17 +01:00
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se_aes_unwrap_key(0x0D, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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2018-05-04 08:15:29 +01:00
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break;
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2018-05-13 02:13:17 +01:00
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case KB_FIRMWARE_VERSION_400:
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se_aes_unwrap_key(0x0D, 0x0F, console_keyseed_4xx);
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se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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2018-05-04 08:15:29 +01:00
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break;
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2018-05-13 02:13:17 +01:00
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case KB_FIRMWARE_VERSION_500:
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default:
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se_aes_unwrap_key(0x0A, 0x0F, console_keyseed_4xx);
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se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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2018-05-04 08:15:29 +01:00
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break;
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}
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2018-05-13 02:13:17 +01:00
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// Package2 key
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se_key_acc_ctrl(0x08, 0x15);
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se_aes_unwrap_key(0x08, 0x0C, key8_keyseed);
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2018-05-01 06:15:48 +01:00
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}
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2018-05-04 08:15:29 +01:00
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2018-05-01 06:15:48 +01:00
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typedef struct _launch_ctxt_t
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{
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void *keyblob;
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void *pkg1;
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const pkg1_id_t *pkg1_id;
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void *warmboot;
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u32 warmboot_size;
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void *secmon;
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u32 secmon_size;
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void *pkg2;
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u32 pkg2_size;
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void *kernel;
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u32 kernel_size;
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link_t kip1_list;
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2018-06-01 17:22:11 +01:00
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u8 *svcperm;
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u8 *debugmode;
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2018-05-01 06:15:48 +01:00
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} launch_ctxt_t;
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typedef struct _merge_kip_t
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{
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void *kip1;
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link_t link;
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} merge_kip_t;
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static int _read_emmc_pkg1(launch_ctxt_t *ctxt)
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{
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int res = 0;
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sdmmc_storage_t storage;
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sdmmc_t sdmmc;
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sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4);
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//Read package1.
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ctxt->pkg1 = (u8 *)malloc(0x40000);
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sdmmc_storage_set_mmc_partition(&storage, 1);
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sdmmc_storage_read(&storage, 0x100000 / NX_EMMC_BLOCKSIZE, 0x40000 / NX_EMMC_BLOCKSIZE, ctxt->pkg1);
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ctxt->pkg1_id = pkg1_identify(ctxt->pkg1);
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if (!ctxt->pkg1_id)
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{
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2018-06-01 22:30:02 +01:00
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gfx_printf(&gfx_con, "%kCould not identify package1,\nVersion (= '%s').%k\n", 0xFF0000FF, (char *)ctxt->pkg1 + 0x10, 0xFFFFFFFF);
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2018-05-01 06:15:48 +01:00
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goto out;
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}
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2018-06-01 22:30:02 +01:00
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gfx_printf(&gfx_con, "Identified package1 ('%s'),\nKeyblob version %d\n\n", (char *)(ctxt->pkg1 + 0x10), ctxt->pkg1_id->kb);
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2018-05-01 06:15:48 +01:00
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//Read the correct keyblob.
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ctxt->keyblob = (u8 *)malloc(NX_EMMC_BLOCKSIZE);
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sdmmc_storage_read(&storage, 0x180000 / NX_EMMC_BLOCKSIZE + ctxt->pkg1_id->kb, 1, ctxt->keyblob);
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res = 1;
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out:;
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sdmmc_storage_end(&storage);
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return res;
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}
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static int _read_emmc_pkg2(launch_ctxt_t *ctxt)
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{
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int res = 0;
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sdmmc_storage_t storage;
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sdmmc_t sdmmc;
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sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4);
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sdmmc_storage_set_mmc_partition(&storage, 0);
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//Parse eMMC GPT.
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LIST_INIT(gpt);
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nx_emmc_gpt_parse(&gpt, &storage);
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2018-06-01 17:02:13 +01:00
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DPRINTF("Parsed GPT\n");
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2018-05-01 06:15:48 +01:00
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//Find package2 partition.
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emmc_part_t *pkg2_part = nx_emmc_part_find(&gpt, "BCPKG2-1-Normal-Main");
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if (!pkg2_part)
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goto out;
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//Read in package2 header and get package2 real size.
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//TODO: implement memalign for DMA buffers.
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u8 *tmp = (u8 *)malloc(NX_EMMC_BLOCKSIZE);
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nx_emmc_part_read(&storage, pkg2_part, 0x4000 / NX_EMMC_BLOCKSIZE, 1, tmp);
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u32 *hdr = (u32 *)(tmp + 0x100);
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u32 pkg2_size = hdr[0] ^ hdr[2] ^ hdr[3];
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free(tmp);
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2018-06-01 17:02:13 +01:00
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DPRINTF("pkg2 size on emmc is %08X\n", pkg2_size);
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2018-05-01 06:15:48 +01:00
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//Read in package2.
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u32 pkg2_size_aligned = ALIGN(pkg2_size, NX_EMMC_BLOCKSIZE);
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2018-06-01 17:02:13 +01:00
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DPRINTF("pkg2 size aligned is %08X\n", pkg2_size_aligned);
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2018-05-01 06:15:48 +01:00
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ctxt->pkg2 = malloc(pkg2_size_aligned);
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ctxt->pkg2_size = pkg2_size;
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|
|
nx_emmc_part_read(&storage, pkg2_part, 0x4000 / NX_EMMC_BLOCKSIZE,
|
|
|
|
pkg2_size_aligned / NX_EMMC_BLOCKSIZE, ctxt->pkg2);
|
|
|
|
|
|
|
|
res = 1;
|
|
|
|
|
|
|
|
out:;
|
|
|
|
nx_emmc_gpt_free(&gpt);
|
|
|
|
sdmmc_storage_end(&storage);
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _config_warmboot(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
FIL fp;
|
|
|
|
if (f_open(&fp, value, FA_READ) != FR_OK)
|
|
|
|
return 0;
|
|
|
|
ctxt->warmboot_size = f_size(&fp);
|
|
|
|
ctxt->warmboot = malloc(ctxt->warmboot_size);
|
|
|
|
f_read(&fp, ctxt->warmboot, ctxt->warmboot_size, NULL);
|
|
|
|
f_close(&fp);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _config_secmon(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
FIL fp;
|
|
|
|
if (f_open(&fp, value, FA_READ) != FR_OK)
|
|
|
|
return 0;
|
|
|
|
ctxt->secmon_size = f_size(&fp);
|
|
|
|
ctxt->secmon = malloc(ctxt->secmon_size);
|
|
|
|
f_read(&fp, ctxt->secmon, ctxt->secmon_size, NULL);
|
|
|
|
f_close(&fp);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _config_kernel(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
FIL fp;
|
|
|
|
if (f_open(&fp, value, FA_READ) != FR_OK)
|
|
|
|
return 0;
|
|
|
|
ctxt->kernel_size = f_size(&fp);
|
|
|
|
ctxt->kernel = malloc(ctxt->kernel_size);
|
|
|
|
f_read(&fp, ctxt->kernel, ctxt->kernel_size, NULL);
|
|
|
|
f_close(&fp);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _config_kip1(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
FIL fp;
|
|
|
|
if (f_open(&fp, value, FA_READ) != FR_OK)
|
|
|
|
return 0;
|
|
|
|
merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t));
|
|
|
|
mkip1->kip1 = malloc(f_size(&fp));
|
|
|
|
f_read(&fp, mkip1->kip1, f_size(&fp), NULL);
|
2018-06-01 17:02:13 +01:00
|
|
|
DPRINTF("Loaded kip1 from SD (size %08X)\n", f_size(&fp));
|
2018-05-01 06:15:48 +01:00
|
|
|
f_close(&fp);
|
|
|
|
list_append(&ctxt->kip1_list, &mkip1->link);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-06-01 17:22:11 +01:00
|
|
|
static int _config_svcperm(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
if (*(u8 *)value == '1')
|
|
|
|
{
|
|
|
|
DPRINTF("Disabled SVC verification\n");
|
|
|
|
ctxt->svcperm = malloc(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int _config_debugmode(launch_ctxt_t *ctxt, const char *value)
|
|
|
|
{
|
|
|
|
if (*(u8 *)value == '1')
|
|
|
|
{
|
|
|
|
DPRINTF("Enabled Debug mode\n");
|
|
|
|
ctxt->debugmode = malloc(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-05-01 06:15:48 +01:00
|
|
|
typedef struct _cfg_handler_t
|
|
|
|
{
|
|
|
|
const char *key;
|
|
|
|
int (*handler)(launch_ctxt_t *ctxt, const char *value);
|
|
|
|
} cfg_handler_t;
|
|
|
|
|
|
|
|
static const cfg_handler_t _config_handlers[] = {
|
|
|
|
{ "warmboot", _config_warmboot },
|
|
|
|
{ "secmon", _config_secmon },
|
|
|
|
{ "kernel", _config_kernel },
|
|
|
|
{ "kip1", _config_kip1 },
|
2018-06-01 17:22:11 +01:00
|
|
|
{ "fullsvcperm", _config_svcperm },
|
|
|
|
{ "debugmode", _config_debugmode },
|
2018-05-01 06:15:48 +01:00
|
|
|
{ NULL, NULL },
|
|
|
|
};
|
|
|
|
|
|
|
|
static int _config(launch_ctxt_t *ctxt, ini_sec_t *cfg)
|
|
|
|
{
|
|
|
|
LIST_FOREACH_ENTRY(ini_kv_t, kv, &cfg->kvs, link)
|
|
|
|
for(u32 i = 0; _config_handlers[i].key; i++)
|
|
|
|
if (!strcmp(_config_handlers[i].key, kv->key) &&
|
|
|
|
!_config_handlers[i].handler(ctxt, kv->val))
|
|
|
|
return 0;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
int hos_launch(ini_sec_t *cfg)
|
|
|
|
{
|
2018-06-01 22:12:22 +01:00
|
|
|
int bootStatePackage2;
|
|
|
|
int bootStateContinue;
|
2018-05-01 06:15:48 +01:00
|
|
|
launch_ctxt_t ctxt;
|
|
|
|
memset(&ctxt, 0, sizeof(launch_ctxt_t));
|
|
|
|
list_init(&ctxt.kip1_list);
|
|
|
|
|
|
|
|
if (cfg && !_config(&ctxt, cfg))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
//Read package1 and the correct keyblob.
|
|
|
|
if (!_read_emmc_pkg1(&ctxt))
|
|
|
|
return 0;
|
|
|
|
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Loaded package1 and keyblob\n");
|
2018-05-01 06:15:48 +01:00
|
|
|
//Generate keys.
|
2018-05-04 08:15:29 +01:00
|
|
|
keygen(ctxt.keyblob, ctxt.pkg1_id->kb, (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off);
|
2018-06-01 17:58:25 +01:00
|
|
|
DPRINTF("Generated keys\n");
|
2018-05-01 06:15:48 +01:00
|
|
|
//Decrypt and unpack package1 if we require parts of it.
|
|
|
|
if (!ctxt.warmboot || !ctxt.secmon)
|
|
|
|
{
|
|
|
|
pkg1_decrypt(ctxt.pkg1_id, ctxt.pkg1);
|
|
|
|
pkg1_unpack((void *)0x8000D000, (void *)ctxt.pkg1_id->secmon_base, ctxt.pkg1_id, ctxt.pkg1);
|
|
|
|
//gfx_hexdump(&gfx_con, 0x8000D000, (void *)0x8000D000, 0x100);
|
|
|
|
//gfx_hexdump(&gfx_con, ctxt.pkg1_id->secmon_base, (void *)ctxt.pkg1_id->secmon_base, 0x100);
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Decrypted and unpacked package1\n");
|
2018-05-01 06:15:48 +01:00
|
|
|
}
|
|
|
|
//Replace 'warmboot.bin' if requested.
|
|
|
|
if (ctxt.warmboot)
|
|
|
|
memcpy((void *)0x8000D000, ctxt.warmboot, ctxt.warmboot_size);
|
|
|
|
//Set warmboot address in PMC.
|
|
|
|
PMC(APBDEV_PMC_SCRATCH1) = 0x8000D000;
|
|
|
|
//Replace 'SecureMonitor' if requested.
|
2018-05-04 08:15:29 +01:00
|
|
|
if (ctxt.secmon) {
|
2018-05-01 06:15:48 +01:00
|
|
|
memcpy((void *)ctxt.pkg1_id->secmon_base, ctxt.secmon, ctxt.secmon_size);
|
2018-05-04 08:15:29 +01:00
|
|
|
}
|
2018-05-01 06:15:48 +01:00
|
|
|
else
|
|
|
|
{
|
|
|
|
//Else we patch it to allow for an unsigned package2.
|
|
|
|
patch_t *secmon_patchset = ctxt.pkg1_id->secmon_patchset;
|
2018-06-01 17:22:11 +01:00
|
|
|
//In case a kernel patch option is set. Allows to disable Svc Verififcation or/and enable Debug mode
|
|
|
|
patch_t *kernel_patchset = ctxt.pkg1_id->kernel_patchset;
|
2018-05-13 02:13:17 +01:00
|
|
|
|
2018-06-01 17:22:11 +01:00
|
|
|
if (secmon_patchset != NULL || (kernel_patchset != NULL && (ctxt.svcperm || ctxt.debugmode))) {
|
|
|
|
if (secmon_patchset != NULL)
|
|
|
|
{
|
|
|
|
gfx_printf(&gfx_con, "%kPatching Security Monitor%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
|
|
|
for (u32 i = 0; secmon_patchset[i].off != 0xFFFFFFFF; i++)
|
|
|
|
*(vu32 *)(ctxt.pkg1_id->secmon_base + secmon_patchset[i].off) = secmon_patchset[i].val;
|
|
|
|
}
|
2018-05-04 08:15:29 +01:00
|
|
|
|
2018-06-01 17:22:11 +01:00
|
|
|
gfx_printf(&gfx_con, "Loaded warmboot.bin and secmon\n");
|
2018-05-13 02:13:17 +01:00
|
|
|
|
|
|
|
//Read package2.
|
|
|
|
if (!_read_emmc_pkg2(&ctxt))
|
|
|
|
return 0;
|
|
|
|
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Read package2\n");
|
2018-05-13 02:13:17 +01:00
|
|
|
//Decrypt package2 and parse KIP1 blobs in INI1 section.
|
|
|
|
pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
|
|
|
|
|
|
|
|
LIST_INIT(kip1_info);
|
|
|
|
pkg2_parse_kips(&kip1_info, pkg2_hdr);
|
|
|
|
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Parsed ini1\n");
|
2018-05-13 02:13:17 +01:00
|
|
|
|
|
|
|
//Use the kernel included in package2 in case we didn't load one already.
|
|
|
|
if (!ctxt.kernel)
|
|
|
|
{
|
|
|
|
ctxt.kernel = pkg2_hdr->data;
|
|
|
|
ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL];
|
2018-06-01 17:22:11 +01:00
|
|
|
|
|
|
|
if (kernel_patchset != NULL && (ctxt.svcperm || ctxt.debugmode))
|
|
|
|
{
|
|
|
|
gfx_printf(&gfx_con, "%kPatching kernel%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
|
|
|
if (ctxt.svcperm && kernel_patchset[0].off != 0xFFFFFFFF)
|
|
|
|
*(vu32 *)(ctxt.kernel + kernel_patchset[0].off) = kernel_patchset[0].val;
|
|
|
|
if (ctxt.debugmode && kernel_patchset[1].off != 0xFFFFFFFF)
|
|
|
|
*(vu32 *)(ctxt.kernel + kernel_patchset[1].off) = kernel_patchset[1].val;
|
|
|
|
}
|
2018-05-13 02:13:17 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
//Merge extra KIP1s into loaded ones.
|
2018-06-01 17:22:11 +01:00
|
|
|
gfx_printf(&gfx_con, "%kPatching kernel initial processes%k\n", 0xFF00BAFF, 0xFFCCCCCC);
|
2018-05-13 02:13:17 +01:00
|
|
|
LIST_FOREACH_ENTRY(merge_kip_t, mki, &ctxt.kip1_list, link)
|
|
|
|
pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1);
|
|
|
|
|
|
|
|
//Rebuild and encrypt package2.
|
|
|
|
pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Rebuilt and loaded package2\n");
|
2018-05-04 08:15:29 +01:00
|
|
|
} else {
|
|
|
|
//Read package2.
|
|
|
|
if (!_read_emmc_pkg2(&ctxt))
|
|
|
|
return 0;
|
2018-05-01 06:15:48 +01:00
|
|
|
|
2018-06-01 17:02:13 +01:00
|
|
|
gfx_printf(&gfx_con, "Loaded package2\n");
|
2018-05-04 08:15:29 +01:00
|
|
|
memcpy((void *)0xA9800000, ctxt.pkg2, ctxt.pkg2_size);
|
|
|
|
}
|
2018-05-01 06:15:48 +01:00
|
|
|
}
|
2018-06-01 22:12:22 +01:00
|
|
|
// Unmount SD Card
|
|
|
|
f_mount(NULL, "", 1);
|
2018-05-01 06:15:48 +01:00
|
|
|
|
2018-06-01 17:22:11 +01:00
|
|
|
gfx_printf(&gfx_con, "\n%kBooting...%k\n", 0xFF00FF96, 0xFFCCCCCC);
|
|
|
|
|
2018-05-29 00:11:22 +01:00
|
|
|
se_aes_key_clear(0x8);
|
|
|
|
se_aes_key_clear(0xB);
|
2018-06-01 22:12:22 +01:00
|
|
|
|
2018-05-29 00:11:22 +01:00
|
|
|
switch (ctxt.pkg1_id->kb) {
|
|
|
|
case KB_FIRMWARE_VERSION_100_200:
|
|
|
|
case KB_FIRMWARE_VERSION_300:
|
|
|
|
case KB_FIRMWARE_VERSION_301:
|
|
|
|
se_key_acc_ctrl(0xC, 0xFF);
|
|
|
|
se_key_acc_ctrl(0xD, 0xFF);
|
2018-06-01 22:12:22 +01:00
|
|
|
bootStatePackage2 = 2;
|
|
|
|
bootStateContinue = 3;
|
2018-05-29 00:11:22 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
case KB_FIRMWARE_VERSION_400:
|
|
|
|
case KB_FIRMWARE_VERSION_500:
|
|
|
|
se_key_acc_ctrl(0xC, 0xFF);
|
|
|
|
se_key_acc_ctrl(0xF, 0xFF);
|
2018-06-01 22:12:22 +01:00
|
|
|
bootStatePackage2 = 3;
|
|
|
|
bootStateContinue = 4;
|
2018-05-29 00:11:22 +01:00
|
|
|
break;
|
|
|
|
}
|
2018-05-01 06:15:48 +01:00
|
|
|
|
|
|
|
//Clear 'BootConfig'.
|
|
|
|
memset((void *)0x4003D000, 0, 0x3000);
|
|
|
|
|
|
|
|
//pkg2_decrypt((void *)0xA9800000);
|
|
|
|
//sleep(10000);
|
|
|
|
//btn_wait();
|
|
|
|
//return 0;
|
|
|
|
|
|
|
|
//Lock SE before starting 'SecureMonitor'.
|
|
|
|
_se_lock();
|
|
|
|
|
|
|
|
vu32 *mb_in = (vu32 *)0x40002EF8;
|
|
|
|
vu32 *mb_out = (vu32 *)0x40002EFC;
|
|
|
|
|
2018-06-01 22:12:22 +01:00
|
|
|
*mb_in = bootStatePackage2;
|
2018-05-01 06:15:48 +01:00
|
|
|
*mb_out = 0;
|
|
|
|
|
|
|
|
//Wait for secmon to get ready.
|
|
|
|
cluster_boot_cpu0(ctxt.pkg1_id->secmon_base);
|
|
|
|
while (!*mb_out)
|
|
|
|
sleep(1);
|
|
|
|
|
|
|
|
//Signal 'BootConfig'.
|
2018-06-01 22:12:22 +01:00
|
|
|
//*mb_in = 1;
|
|
|
|
//sleep(100);
|
2018-05-13 02:13:17 +01:00
|
|
|
|
2018-05-01 06:15:48 +01:00
|
|
|
/*PMC(0x4) = 0x7FFFF3;
|
|
|
|
PMC(0x2C4) = 0xFFFFFFFF;
|
|
|
|
PMC(0x2D8) = 0xFFAFFFFF;
|
|
|
|
PMC(0x5B0) = 0xFFFFFFFF;
|
|
|
|
PMC(0x5B4) = 0xFFFFFFFF;
|
|
|
|
PMC(0x5B8) = 0xFFFFFFFF;
|
|
|
|
PMC(0x5BC) = 0xFFFFFFFF;
|
|
|
|
PMC(0x5C0) = 0xFFAAFFFF;*/
|
|
|
|
|
|
|
|
//TODO: Cleanup.
|
|
|
|
//display_end();
|
|
|
|
|
|
|
|
//Signal to continue boot.
|
2018-06-01 22:12:22 +01:00
|
|
|
*mb_in = bootStateContinue;
|
2018-05-01 06:15:48 +01:00
|
|
|
|
|
|
|
//Halt ourselves in waitevent state.
|
|
|
|
while (1)
|
|
|
|
FLOW_CTLR(0x4) = 0x50000000;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|