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bdk: max77812: exit if RAM reg and not 211 phase
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1 changed files with 12 additions and 1 deletions
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@ -121,7 +121,12 @@ static u8 _max7762x_get_i2c_address(u32 id)
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case REGULATOR_BC0:
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case REGULATOR_BC0:
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return (id == REGULATOR_CPU0 ? MAX77621_CPU_I2C_ADDR : MAX77621_GPU_I2C_ADDR);
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return (id == REGULATOR_CPU0 ? MAX77621_CPU_I2C_ADDR : MAX77621_GPU_I2C_ADDR);
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case REGULATOR_BC1:
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case REGULATOR_BC1:
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return _max77812_get_address();
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{
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u8 reg_addr = _max77812_get_address();
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if (id == REGULATOR_RAM1 && reg_addr == MAX77812_PHASE31_CPU_I2C_ADDR)
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reg_addr = 0;
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return reg_addr;
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}
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default:
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default:
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return 0;
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return 0;
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}
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}
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@ -186,6 +191,8 @@ int max7762x_regulator_set_voltage(u32 id, u32 uv)
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return 0;
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return 0;
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u8 addr = _max7762x_get_i2c_address(id);
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u8 addr = _max7762x_get_i2c_address(id);
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if (!addr)
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return 0;
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// Calculate voltage multiplier.
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// Calculate voltage multiplier.
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u32 mult = (uv + reg->uv_step - 1 - reg->uv_min) / reg->uv_step;
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u32 mult = (uv + reg->uv_step - 1 - reg->uv_min) / reg->uv_step;
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@ -249,6 +256,8 @@ int max7762x_regulator_enable(u32 id, bool enable)
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}
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}
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u8 addr = _max7762x_get_i2c_address(id);
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u8 addr = _max7762x_get_i2c_address(id);
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if (!addr)
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return 0;
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// Read and enable/disable.
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// Read and enable/disable.
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u8 val = i2c_recv_byte(I2C_5, addr, reg_addr);
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u8 val = i2c_recv_byte(I2C_5, addr, reg_addr);
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@ -291,6 +300,8 @@ void max77621_config_default(u32 id, bool por)
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return;
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return;
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u8 addr = _max7762x_get_i2c_address(id);
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u8 addr = _max7762x_get_i2c_address(id);
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if (!addr)
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return;
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if (por)
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if (por)
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{
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{
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