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bdk: hwdeinit: restore order of bpmp clock set
Restore order of bpmp clock scale down in deinit, in order to decrease pressure on clock deinits.
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parent
26fa363ca4
commit
17cdd5af0d
1 changed files with 5 additions and 3 deletions
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@ -376,7 +376,7 @@ void hw_init()
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// Initialize I2C5, mandatory for PMIC.
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i2c_init(I2C_5);
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// Power up Joycon MCU (Sio) on Hoag as it's required for I2C1 communication.
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// Enable LDO8 on HOAG as it also powers I2C1 IO pads.
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if (nx_hoag)
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{
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max7762x_regulator_set_voltage(REGULATOR_LDO8, 2800000);
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@ -415,6 +415,9 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic)
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{
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bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
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// Scale down BPMP clock.
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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#ifdef BDK_HW_EXTRA_DEINIT
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// Disable temperature sensor, touchscreen, 5V regulators, Joy-Con and VIC.
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vic_end();
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@ -429,9 +432,8 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic)
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minerva_change_freq(FREQ_204);
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nyx_str->mtc_cfg.init_done = 0;
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// Flush/disable MMU cache and scale down BPMP clock also.
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// Flush/disable MMU cache.
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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// Re-enable clocks to Audio Processing Engine as a workaround to hanging.
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if (tegra_t210)
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