mirrors/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-22 18:06:40 +00:00
Code Issues Releases Activity

clock: Prevent PLLC4 from glitching

Browse source
This commit is contained in:
CTCaer 2020-06-14 13:19:53 +03:00
parent bb2b339b54
commit 1d3d1c8454
2 changed files with 8 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
bootloader/soc/clock.c
View file

@ -349,12 +349,15 @@ static void _clock_disable_pllc4(u32 mask)
{
pllc4_enabled &= ~mask;
if (pllc4_enabled & PLLC4_IN_USE)
// Check if currently in use or disabled.
if ((pllc4_enabled & PLLC4_IN_USE) || !(pllc4_enabled & PLLC4_ENABLED))
return;
// Disable PLLC4.
msleep(1); // Wait at least 1ms to prevent glitching.
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
usleep(10);
pllc4_enabled = 0;
}

5
nyx/nyx_gui/soc/clock.c
View file

@ -349,12 +349,15 @@ static void _clock_disable_pllc4(u32 mask)
{
pllc4_enabled &= ~mask;
if (pllc4_enabled & PLLC4_IN_USE)
// Check if currently in use or disabled.
if ((pllc4_enabled & PLLC4_IN_USE) || !(pllc4_enabled & PLLC4_ENABLED))
return;
// Disable PLLC4.
msleep(1); // Wait at least 1ms to prevent glitching.
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
usleep(10);
pllc4_enabled = 0;
}