mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-22 18:06:40 +00:00
Refactored the firmware loader and LP0 config.
This commit is contained in:
nwert
parent
120e8f5870
commit
24e172b5fb
3 changed files with 140 additions and 145 deletions
265
ipl/hos.c
265
ipl/hos.c
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@ -38,14 +38,41 @@ extern gfx_con_t gfx_con;
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//#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)
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#define DPRINTF(...)
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enum KB_FIRMWARE_VERSION {
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KB_FIRMWARE_VERSION_100_200 = 0,
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KB_FIRMWARE_VERSION_300 = 1,
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KB_FIRMWARE_VERSION_301 = 2,
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KB_FIRMWARE_VERSION_400 = 3,
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KB_FIRMWARE_VERSION_500 = 4,
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KB_FIRMWARE_VERSION_MAX
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};
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typedef struct _launch_ctxt_t
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{
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void *keyblob;
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void *pkg1;
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const pkg1_id_t *pkg1_id;
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const pkg2_kernel_id_t *pkg2_kernel_id;
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void *warmboot;
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u32 warmboot_size;
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void *secmon;
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u32 secmon_size;
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void *pkg2;
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u32 pkg2_size;
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void *kernel;
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u32 kernel_size;
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link_t kip1_list;
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int svcperm;
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int debugmode;
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} launch_ctxt_t;
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typedef struct _merge_kip_t
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{
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void *kip1;
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link_t link;
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} merge_kip_t;
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#define KB_FIRMWARE_VERSION_100_200 0
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#define KB_FIRMWARE_VERSION_300 1
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#define KB_FIRMWARE_VERSION_301 2
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#define KB_FIRMWARE_VERSION_400 3
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#define KB_FIRMWARE_VERSION_500 4
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#define NUM_KEYBLOB_KEYS 5
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static const u8 keyblob_keyseeds[NUM_KEYBLOB_KEYS][0x10] = {
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@ -74,20 +101,17 @@ static const u8 master_keyseed_4xx[0x10] =
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static const u8 console_keyseed_4xx[0x10] =
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{ 0x0C, 0x91, 0x09, 0xDB, 0x93, 0x93, 0x07, 0x81, 0x07, 0x3C, 0xC4, 0x16, 0x22, 0x7C, 0x6C, 0x28 };
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#define CRC32C_POLY 0x82f63b78
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#define CRC32C_POLY 0x82F63B78
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u32 crc32c(const u8 *buf, u32 len)
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{
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int i;
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u32 crc = 0;
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crc = ~crc;
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while (len--) {
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crc ^= *buf++;
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for (i = 0; i < 8; i++)
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crc = crc & 1 ? (crc >> 1) ^ CRC32C_POLY : crc >> 1;
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}
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return ~crc;
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u32 crc = 0xFFFFFFFF;
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while (len--)
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{
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crc ^= *buf++;
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for (int i = 0; i < 8; i++)
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crc = crc & 1 ? (crc >> 1) ^ CRC32C_POLY : crc >> 1;
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}
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return ~crc;
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}
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static void _se_lock()
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@ -117,7 +141,6 @@ static void _se_lock()
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gfx_hexdump(&gfx_con, SE_BASE, (void *)SE_BASE, 0x400);*/
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}
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// <-- key derivation algorithm
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int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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{
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u8 tmp[0x10];
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@ -157,7 +180,8 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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se_aes_crypt_block_ecb(0x0C, 0, tmp, master_keyseed_retail);
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switch (kb) {
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switch (kb)
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{
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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@ -181,44 +205,13 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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break;
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}
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// Package2 key
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//Package2 key.
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se_key_acc_ctrl(0x08, 0x15);
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se_aes_unwrap_key(0x08, 0x0C, key8_keyseed);
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return 1;
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}
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typedef struct _launch_ctxt_t
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{
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void *keyblob;
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void *pkg1;
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const pkg1_id_t *pkg1_id;
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const pkg2_kernel_id_t *pkg2_kernel_id;
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void *warmboot;
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u32 warmboot_size;
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void *secmon;
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u32 secmon_size;
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void *pkg2;
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u32 pkg2_size;
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void *kernel;
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u32 kernel_size;
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link_t kip1_list;
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int svcperm;
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int debugmode;
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} launch_ctxt_t;
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typedef struct _merge_kip_t
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{
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void *kip1;
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link_t link;
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} merge_kip_t;
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static int _read_emmc_pkg1(launch_ctxt_t *ctxt)
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{
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int res = 0;
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@ -344,23 +337,21 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value)
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static int _config_svcperm(launch_ctxt_t *ctxt, const char *value)
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{
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if (*(u8 *)value == '1')
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if (*value == '1')
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{
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DPRINTF("Disabled SVC verification\n");
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ctxt->svcperm = 1;
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}
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return 1;
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}
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static int _config_debugmode(launch_ctxt_t *ctxt, const char *value)
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{
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if (*(u8 *)value == '1')
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if (*value == '1')
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{
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DPRINTF("Enabled Debug mode\n");
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ctxt->debugmode = 1;
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}
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return 1;
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}
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@ -395,15 +386,17 @@ int hos_launch(ini_sec_t *cfg)
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int bootStateDramPkg2;
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int bootStatePkg2Continue;
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launch_ctxt_t ctxt;
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memset(&ctxt, 0, sizeof(launch_ctxt_t));
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list_init(&ctxt.kip1_list);
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gfx_clear_grey(&gfx_ctxt, 0x1B);
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gfx_con_setpos(&gfx_con, 0, 0);
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//Try to parse config if present.
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if (cfg && !_config(&ctxt, cfg))
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return 0;
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gfx_printf(&gfx_con, "Initializing...\n\n");
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//Read package1 and the correct keyblob.
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@ -411,9 +404,11 @@ int hos_launch(ini_sec_t *cfg)
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return 0;
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gfx_printf(&gfx_con, "Loaded package1 and keyblob\n");
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//Generate keys.
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keygen(ctxt.keyblob, ctxt.pkg1_id->kb, (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off);
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DPRINTF("Generated keys\n");
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//Decrypt and unpack package1 if we require parts of it.
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if (!ctxt.warmboot || !ctxt.secmon)
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{
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@ -421,85 +416,77 @@ int hos_launch(ini_sec_t *cfg)
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pkg1_unpack((void *)ctxt.pkg1_id->warmboot_base, (void *)ctxt.pkg1_id->secmon_base, NULL, ctxt.pkg1_id, ctxt.pkg1);
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gfx_printf(&gfx_con, "Decrypted and unpacked package1\n");
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}
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//Replace 'warmboot.bin' if requested.
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if (ctxt.warmboot)
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memcpy((void *)ctxt.pkg1_id->warmboot_base, ctxt.warmboot, ctxt.warmboot_size);
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//Set warmboot address in PMC if required.
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if (ctxt.pkg1_id->set_warmboot)
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PMC(APBDEV_PMC_SCRATCH1) = 0x8000D000;
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//Replace 'SecureMonitor' if requested.
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if (ctxt.secmon) {
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if (ctxt.secmon)
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memcpy((void *)ctxt.pkg1_id->secmon_base, ctxt.secmon, ctxt.secmon_size);
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}
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else
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{
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//Else we patch it to allow for an unsigned package2 and patched kernel.
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patch_t *secmon_patchset = ctxt.pkg1_id->secmon_patchset;
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gfx_printf(&gfx_con, "%kPatching Security Monitor%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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for (u32 i = 0; secmon_patchset[i].off != 0xFFFFFFFF; i++)
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*(vu32 *)(ctxt.pkg1_id->secmon_base + secmon_patchset[i].off) = secmon_patchset[i].val;
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}
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if (secmon_patchset != NULL)
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gfx_printf(&gfx_con, "Loaded warmboot.bin and secmon\n");
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//Read package2.
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if (!_read_emmc_pkg2(&ctxt))
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return 0;
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gfx_printf(&gfx_con, "Read package2\n");
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//Decrypt package2 and parse KIP1 blobs in INI1 section.
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pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
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LIST_INIT(kip1_info);
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pkg2_parse_kips(&kip1_info, pkg2_hdr);
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gfx_printf(&gfx_con, "Parsed ini1\n");
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//Use the kernel included in package2 in case we didn't load one already.
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if (!ctxt.kernel)
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{
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ctxt.kernel = pkg2_hdr->data;
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ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL];
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if (ctxt.svcperm || ctxt.debugmode)
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{
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gfx_printf(&gfx_con, "%kPatching Security Monitor%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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for (u32 i = 0; secmon_patchset[i].off != 0xFFFFFFFF; i++)
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*(vu32 *)(ctxt.pkg1_id->secmon_base + secmon_patchset[i].off) = secmon_patchset[i].val;
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u32 kernel_crc32 = crc32c((u8 *)ctxt.kernel, ctxt.kernel_size);
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ctxt.pkg2_kernel_id = pkg2_identify(kernel_crc32);
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gfx_printf(&gfx_con, "Loaded warmboot.bin and secmon\n");
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//Read package2.
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if (!_read_emmc_pkg2(&ctxt))
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return 0;
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gfx_printf(&gfx_con, "Read package2\n");
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//Decrypt package2 and parse KIP1 blobs in INI1 section.
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pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
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LIST_INIT(kip1_info);
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pkg2_parse_kips(&kip1_info, pkg2_hdr);
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gfx_printf(&gfx_con, "Parsed ini1\n");
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//Use the kernel included in package2 in case we didn't load one already.
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if (!ctxt.kernel)
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//In case a kernel patch option is set; allows to disable SVC verification or/and enable debug mode.
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patch_t *kernel_patchset = ctxt.pkg2_kernel_id->kernel_patchset;
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if (kernel_patchset != NULL)
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{
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ctxt.kernel = pkg2_hdr->data;
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ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL];
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if (ctxt.svcperm || ctxt.debugmode)
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{
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u32 kernel_crc32 = crc32c((u8 *)ctxt.kernel, ctxt.kernel_size);
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ctxt.pkg2_kernel_id = pkg2_identify(kernel_crc32);
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//In case a kernel patch option is set. Allows to disable Svc Verififcation or/and enable Debug mode
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patch_t *kernel_patchset = ctxt.pkg2_kernel_id->kernel_patchset;
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if (kernel_patchset != NULL)
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{
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gfx_printf(&gfx_con, "%kPatching kernel%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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if (ctxt.svcperm && kernel_patchset[0].off != 0xFFFFFFFF)
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*(vu32 *)(ctxt.kernel + kernel_patchset[0].off) = kernel_patchset[0].val;
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if (ctxt.debugmode && kernel_patchset[1].off != 0xFFFFFFFF)
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*(vu32 *)(ctxt.kernel + kernel_patchset[1].off) = kernel_patchset[1].val;
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}
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}
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gfx_printf(&gfx_con, "%kPatching kernel%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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//TODO: this is a bit ugly, perhaps attach a 'key' to the patchset and pass it via ini.
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if (ctxt.svcperm && kernel_patchset[0].off != 0xFFFFFFFF)
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*(vu32 *)(ctxt.kernel + kernel_patchset[0].off) = kernel_patchset[0].val;
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if (ctxt.debugmode && kernel_patchset[1].off != 0xFFFFFFFF)
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*(vu32 *)(ctxt.kernel + kernel_patchset[1].off) = kernel_patchset[1].val;
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}
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//Merge extra KIP1s into loaded ones.
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gfx_printf(&gfx_con, "%kPatching kernel initial processes%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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LIST_FOREACH_ENTRY(merge_kip_t, mki, &ctxt.kip1_list, link)
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pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1);
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//Rebuild and encrypt package2.
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pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
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gfx_printf(&gfx_con, "Rebuilt and loaded package2\n");
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} else {
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//Read package2.
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if (!_read_emmc_pkg2(&ctxt))
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return 0;
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gfx_printf(&gfx_con, "Loaded package2\n");
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memcpy((void *)0xA9800000, ctxt.pkg2, ctxt.pkg2_size);
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}
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}
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// Unmount SD Card
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//Merge extra KIP1s into loaded ones.
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gfx_printf(&gfx_con, "%kPatching kernel initial processes%k\n", 0xFF00BAFF, 0xFFCCCCCC);
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LIST_FOREACH_ENTRY(merge_kip_t, mki, &ctxt.kip1_list, link)
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pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1);
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//Rebuild and encrypt package2.
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pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
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gfx_printf(&gfx_con, "Rebuilt and loaded package2\n");
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//Unmount SD card.
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f_mount(NULL, "", 1);
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gfx_printf(&gfx_con, "\n%kBooting...%k\n", 0xFF00FF96, 0xFFCCCCCC);
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@ -507,33 +494,29 @@ int hos_launch(ini_sec_t *cfg)
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se_aes_key_clear(0x8);
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se_aes_key_clear(0xB);
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switch (ctxt.pkg1_id->kb) {
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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se_key_acc_ctrl(0xC, 0xFF);
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se_key_acc_ctrl(0xD, 0xFF);
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bootStateDramPkg2 = 2;
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bootStatePkg2Continue = 3;
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break;
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default:
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case KB_FIRMWARE_VERSION_400:
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case KB_FIRMWARE_VERSION_500:
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se_key_acc_ctrl(0xC, 0xFF);
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se_key_acc_ctrl(0xF, 0xFF);
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bootStateDramPkg2 = 2;
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bootStatePkg2Continue = 4;
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break;
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switch (ctxt.pkg1_id->kb)
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{
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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se_key_acc_ctrl(0xC, 0xFF);
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se_key_acc_ctrl(0xD, 0xFF);
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bootStateDramPkg2 = 2;
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bootStatePkg2Continue = 3;
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break;
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default:
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case KB_FIRMWARE_VERSION_400:
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case KB_FIRMWARE_VERSION_500:
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se_key_acc_ctrl(0xC, 0xFF);
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se_key_acc_ctrl(0xF, 0xFF);
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bootStateDramPkg2 = 2;
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bootStatePkg2Continue = 4;
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break;
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}
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//TODO: Don't Clear 'BootConfig' for retail >1.0.0.
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memset((void *)0x4003D000, 0, 0x3000);
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//pkg2_decrypt((void *)0xA9800000);
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//sleep(10000);
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//btn_wait();
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//return 0;
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//Lock SE before starting 'SecureMonitor'.
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_se_lock();
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@ -268,7 +268,6 @@ void config_se_brom()
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// Clear the boot reason to avoid problems later
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PMC(APBDEV_PMC_SCRATCH200) = 0x0;
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PMC(APBDEV_PMC_RST_STATUS_0) = 0x0;
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PMC(APBDEV_PMC_SCRATCH49_0) = 0x0;
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}
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void config_hw()
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@ -45,6 +45,7 @@ void sdram_lp0_save_params(const void *params)
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#define c32(value, pmcreg) pmc->pmcreg = value
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//TODO: pkg1.1 reads them from MC.
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//Patch carveout parameters.
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sdram->McGeneralizedCarveout1Bom = 0;
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sdram->McGeneralizedCarveout1BomHi = 0;
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sdram->McGeneralizedCarveout1Size128kb = 0;
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@ -116,6 +117,19 @@ void sdram_lp0_save_params(const void *params)
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sdram->McGeneralizedCarveout5ForceInternalAccess4 = 0;
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sdram->McGeneralizedCarveout5Cfg0 = 0x8F;
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//Patch SDRAM parameters.
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u32 t0 = sdram->EmcSwizzleRank0Byte0 << 5 >> 29 > sdram->EmcSwizzleRank0Byte0 << 1 >> 29;
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u32 t1 = (t0 & 0xFFFFFFEF) | ((sdram->EmcSwizzleRank1Byte0 << 5 >> 29 > sdram->EmcSwizzleRank1Byte0 << 1 >> 29) << 4);
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u32 t2 = (t1 & 0xFFFFFFFD) | ((sdram->EmcSwizzleRank0Byte1 << 5 >> 29 > sdram->EmcSwizzleRank0Byte1 << 1 >> 29) << 1);
|
||||
u32 t3 = (t2 & 0xFFFFFFDF) | ((sdram->EmcSwizzleRank1Byte1 << 5 >> 29 > sdram->EmcSwizzleRank1Byte1 << 1 >> 29) << 5);
|
||||
u32 t4 = (t3 & 0xFFFFFFFB) | ((sdram->EmcSwizzleRank0Byte2 << 5 >> 29 > sdram->EmcSwizzleRank0Byte2 << 1 >> 29) << 2);
|
||||
u32 t5 = (t4 & 0xFFFFFFBF) | ((sdram->EmcSwizzleRank1Byte2 << 5 >> 29 > sdram->EmcSwizzleRank1Byte2 << 1 >> 29) << 6);
|
||||
u32 t6 = (t5 & 0xFFFFFFF7) | ((sdram->EmcSwizzleRank0Byte3 << 5 >> 29 > sdram->EmcSwizzleRank0Byte3 << 1 >> 29) << 3);
|
||||
u32 t7 = (t6 & 0xFFFFFF7F) | ((sdram->EmcSwizzleRank1Byte3 << 5 >> 29 > sdram->EmcSwizzleRank1Byte3 << 1 >> 29) << 7);
|
||||
sdram->SwizzleRankByteEncode = t7;
|
||||
sdram->EmcBctSpare2 = 0x40000DD8;
|
||||
sdram->EmcBctSpare3 = t7;
|
||||
|
||||
s(EmcClockSource, 7:0, scratch6, 15:8);
|
||||
s(EmcClockSourceDll, 7:0, scratch6, 23:16);
|
||||
s(EmcClockSource, 31:29, scratch6, 26:24);
|
||||
|
|
@ -786,9 +800,8 @@ void sdram_lp0_save_params(const void *params)
|
|||
s32(EmcBctSpare6, scratch40);
|
||||
s32(EmcBctSpare5, scratch42);
|
||||
s32(EmcBctSpare4, scratch44);
|
||||
s32(SwizzleRankByteEncode, scratch45);
|
||||
//s32(EmcBctSpare2, scratch46);
|
||||
pmc->scratch46 = 0x40000DD8;
|
||||
s32(EmcBctSpare3, scratch45);
|
||||
s32(EmcBctSpare2, scratch46);
|
||||
s32(EmcBctSpare1, scratch47);
|
||||
s32(EmcBctSpare0, scratch48);
|
||||
s32(EmcBctSpare9, scratch50);
|
||||
|
|
|
|||
Loading…
Reference in a new issue