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https://github.com/CTCaer/hekate.git
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hekate/nyx: stylistic corrections
This commit is contained in:
parent
9a98c1afb9
commit
5193416658
11 changed files with 53 additions and 51 deletions
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@ -2,7 +2,7 @@
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 st4rk
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* Copyright (c) 2018 st4rk
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* Copyright (c) 2018 Ced2911
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* Copyright (c) 2018 Ced2911
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* Copyright (c) 2018-2022 CTCaer
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* Copyright (c) 2018-2023 CTCaer
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* Copyright (c) 2018 balika011
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* Copyright (c) 2018 balika011
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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@ -26,6 +26,8 @@
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#define PKG2_SEC_INI1 1
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#define PKG2_SEC_INI1 1
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#define INI1_MAGIC 0x31494E49
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#define INI1_MAGIC 0x31494E49
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//! TODO: Update on kernel change if needed.
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#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // Offset of OP + 12 is the INI1 offset.
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#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // Offset of OP + 12 is the INI1 offset.
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#define PKG2_NEWKERN_START 0x800
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#define PKG2_NEWKERN_START 0x800
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@ -1,7 +1,7 @@
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/*
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/*
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* L4T Loader for Tegra X1
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* L4T Loader for Tegra X1
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*
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*
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* Copyright (c) 2020-2022 CTCaer
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* Copyright (c) 2020-2023 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -1,7 +1,7 @@
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/*
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 naehrwert
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*
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*
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* Copyright (c) 2018-2022 CTCaer
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* Copyright (c) 2018-2023 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -144,7 +144,7 @@ static void _reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size)
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if (payload_size == 0x7000)
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if (payload_size == 0x7000)
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{
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{
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), coreboot_addr, 0x7000); //Bootblock
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), coreboot_addr, 0x7000); // Bootblock.
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*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
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*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
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}
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}
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}
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}
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@ -311,6 +311,7 @@ static void _launch_payloads()
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// Build configuration menu.
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// Build configuration menu.
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ments[0].type = MENT_BACK;
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ments[0].type = MENT_BACK;
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ments[0].caption = "Back";
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ments[0].caption = "Back";
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ments[1].type = MENT_CHGLINE;
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ments[1].type = MENT_CHGLINE;
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while (true)
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while (true)
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@ -389,14 +390,15 @@ static void _launch_ini_list()
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3));
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3));
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ments[0].type = MENT_BACK;
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ments[0].type = MENT_BACK;
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ments[0].caption = "Back";
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ments[0].caption = "Back";
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ments[1].type = MENT_CHGLINE;
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ments[1].type = MENT_CHGLINE;
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u32 sec_idx = 2;
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u32 sec_idx = 2;
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LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_list_sections, link)
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LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_list_sections, link)
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{
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{
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if (!strcmp(ini_sec->name, "config") ||
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if (ini_sec->type == INI_COMMENT ||
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ini_sec->type == INI_COMMENT ||
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ini_sec->type == INI_NEWLINE ||
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ini_sec->type == INI_NEWLINE)
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!strcmp(ini_sec->name, "config"))
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continue;
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continue;
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ments[sec_idx].type = ini_sec->type;
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ments[sec_idx].type = ini_sec->type;
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@ -517,6 +519,7 @@ static void _launch_config()
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 6));
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 6));
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ments[0].type = MENT_BACK;
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ments[0].type = MENT_BACK;
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ments[0].caption = "Back";
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ments[0].caption = "Back";
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ments[1].type = MENT_CHGLINE;
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ments[1].type = MENT_CHGLINE;
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ments[2].type = MENT_HANDLER;
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ments[2].type = MENT_HANDLER;
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@ -532,9 +535,9 @@ static void _launch_config()
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u32 sec_idx = 5;
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u32 sec_idx = 5;
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LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link)
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LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link)
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{
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{
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if (!strcmp(ini_sec->name, "config") ||
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if (ini_sec->type == INI_COMMENT ||
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ini_sec->type == INI_COMMENT ||
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ini_sec->type == INI_NEWLINE ||
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ini_sec->type == INI_NEWLINE)
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!strcmp(ini_sec->name, "config"))
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continue;
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continue;
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ments[sec_idx].type = ini_sec->type;
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ments[sec_idx].type = ini_sec->type;
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@ -693,15 +696,14 @@ static void _nyx_load_run()
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reloc_meta_t *reloc = (reloc_meta_t *)(IPL_LOAD_ADDR + RELOC_META_OFF);
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reloc_meta_t *reloc = (reloc_meta_t *)(IPL_LOAD_ADDR + RELOC_META_OFF);
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memcpy((u8 *)nyx_str->hekate, (u8 *)reloc->start, reloc->end - reloc->start);
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memcpy((u8 *)nyx_str->hekate, (u8 *)reloc->start, reloc->end - reloc->start);
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void (*nyx_ptr)() = (void *)nyx;
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bpmp_mmu_disable();
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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minerva_periodic_training();
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minerva_periodic_training();
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// Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms.
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// Some cards (Sandisk U1), do not like a fast power cycle.
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sdmmc_storage_init_wait_sd();
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sdmmc_storage_init_wait_sd();
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void (*nyx_ptr)() = (void *)nyx;
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(*nyx_ptr)();
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(*nyx_ptr)();
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}
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}
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@ -30,10 +30,6 @@
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#include "frontend/fe_emmc_tools.h"
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#include "frontend/fe_emmc_tools.h"
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#include "frontend/gui.h"
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#include "frontend/gui.h"
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#ifdef MENU_LOGO_ENABLE
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u8 *Kc_MENU_LOGO;
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#endif //MENU_LOGO_ENABLE
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nyx_config n_cfg;
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nyx_config n_cfg;
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hekate_config h_cfg;
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hekate_config h_cfg;
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@ -121,7 +117,7 @@ void reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size)
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if (payload_size == 0x7000)
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if (payload_size == 0x7000)
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{
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{
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), coreboot_addr, 0x7000); //Bootblock
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), coreboot_addr, 0x7000); // Bootblock.
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*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
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*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
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}
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}
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}
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}
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@ -433,12 +429,13 @@ void nyx_init_load_res()
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void ipl_main()
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void ipl_main()
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{
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{
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// Tegra/Horizon configuration goes to 0x80000000+, package2 goes to 0xA9800000, we place our heap in between.
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// Set heap address.
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heap_init((void *)IPL_HEAP_START);
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heap_init((void *)IPL_HEAP_START);
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b_cfg = (boot_cfg_t *)(nyx_str->hekate + 0x94);
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b_cfg = (boot_cfg_t *)(nyx_str->hekate + 0x94);
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#ifdef DEBUG_UART_PORT
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#ifdef DEBUG_UART_PORT
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// Enable the selected uart debug port.
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#if (DEBUG_UART_PORT == UART_B)
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#if (DEBUG_UART_PORT == UART_B)
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gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO);
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#elif (DEBUG_UART_PORT == UART_C)
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#elif (DEBUG_UART_PORT == UART_C)
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@ -453,9 +450,10 @@ void ipl_main()
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uart_wait_xfer(DEBUG_UART_PORT, UART_TX_IDLE);
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uart_wait_xfer(DEBUG_UART_PORT, UART_TX_IDLE);
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#endif
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#endif
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// Initialize the rest of hw and load nyx's resources.
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// Initialize the rest of hw and load Nyx resources.
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nyx_init_load_res();
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nyx_init_load_res();
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// Initialize Nyx GUI and show it.
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nyx_load_and_run();
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nyx_load_and_run();
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// Halt BPMP if we managed to get out of execution.
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// Halt BPMP if we managed to get out of execution.
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