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l4t: allow setting dram voltage even if no OC
Mostly for allowing undervolting.
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parent
697bde8667
commit
7040f1ada2
1 changed files with 6 additions and 6 deletions
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@ -798,18 +798,18 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt)
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}
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}
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}
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}
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// Set DRAM voltage.
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if (ctxt->ram_oc_vdd2)
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max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000);
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if (ctxt->ram_oc_vddq)
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max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000);
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// A frequency of lower or equal with stock max will skip ARC.
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// A frequency of lower or equal with stock max will skip ARC.
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if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ)
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if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ)
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{
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{
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// Final table.
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// Final table.
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const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1;
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const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1;
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// Set DRAM voltage.
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if (ctxt->ram_oc_vdd2)
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max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000);
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if (ctxt->ram_oc_vddq)
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max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000);
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// Copy table and prep it for Arachne.
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// Copy table and prep it for Arachne.
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memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE);
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memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE);
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