mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-26 11:42:09 +00:00
Add sleep mode support for 3.X.X. ^^
This commit is contained in:
parent
a77783b922
commit
7af531de77
3 changed files with 7 additions and 4 deletions
|
@ -561,6 +561,10 @@ int hos_launch(ini_sec_t *cfg)
|
|||
}
|
||||
case KB_FIRMWARE_VERSION_300:
|
||||
case KB_FIRMWARE_VERSION_301:
|
||||
if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_300)
|
||||
PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0xE3; // Warmboot 3.0.0 security check.
|
||||
else if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_301)
|
||||
PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0x104; // Warmboot 3.0.1/.2 security check.
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(13, 0xFF);
|
||||
bootStateDramPkg2 = 2;
|
||||
|
|
|
@ -1503,9 +1503,7 @@ void restore_emmc_boot() { restore_emmc_selected(PART_BOOT); }
|
|||
void restore_emmc_rawnand() { restore_emmc_selected(PART_RAW); }
|
||||
void restore_emmc_gpp_parts() { restore_emmc_selected(PART_GP_ALL); }
|
||||
|
||||
//TODO: dump_package2
|
||||
|
||||
void dump_package1()
|
||||
void dump_packages12()
|
||||
{
|
||||
u8 *pkg1 = (u8 *)calloc(1, 0x40000);
|
||||
u8 *warmboot = (u8 *)calloc(1, 0x40000);
|
||||
|
@ -2492,7 +2490,7 @@ ment_t ment_tools[] = {
|
|||
MDEF_HANDLER("Verification options", config_verification),
|
||||
MDEF_CHGLINE(),
|
||||
MDEF_CAPTION("-------- Misc --------", 0xFF0AB9E6),
|
||||
MDEF_HANDLER("Dump pkg1.1 & pkg2.1", dump_package1),
|
||||
MDEF_HANDLER("Dump package1/2", dump_packages12),
|
||||
MDEF_HANDLER("Fix battery de-sync", fix_battery_desync),
|
||||
MDEF_HANDLER("Unset archive bit (switch folder)", fix_sd_switch_attr),
|
||||
MDEF_HANDLER("Unset archive bit (all sd files)", fix_sd_all_attr),
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
#define APBDEV_PMC_REG_SHORT 0x2CC
|
||||
#define APBDEV_PMC_WEAK_BIAS 0x2C8
|
||||
#define APBDEV_PMC_SECURE_SCRATCH21 0x334
|
||||
#define APBDEV_PMC_SECURE_SCRATCH32 0x360
|
||||
#define APBDEV_PMC_CNTRL2 0x440
|
||||
#define APBDEV_PMC_IO_DPD4_REQ 0x464
|
||||
#define APBDEV_PMC_DDR_CNTRL 0x4E4
|
||||
|
|
Loading…
Reference in a new issue