mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-22 18:06:40 +00:00
refactor: Remove all unwanted whitespace
This commit is contained in:
parent
9104b85143
commit
7c42f72b8a
135 changed files with 842 additions and 841 deletions
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -420,7 +420,6 @@ void print_tsec_key()
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf("%02X", keys[j]);
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if (pkg1_id->kb == KB_FIRMWARE_VERSION_620)
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{
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gfx_printf("\n%kTSEC root: %k", 0xFF00DDFF, 0xFFCCCCCC);
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@ -254,6 +254,7 @@ void display_color_screen(u32 color)
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DISPLAY_A(_DIREG(DC_WIN_CD_WIN_OPTIONS)) = 0;
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DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = (DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE) | GENERAL_ACT_REQ;
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usleep(35000);
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display_backlight(true);
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -415,7 +415,7 @@ static const cfg_op_t _display_config_11[113] = {
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{DC_DISP_SYNC_WIDTH, 0x10048},
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{DC_DISP_BACK_PORCH, 0x90048},
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{DC_DISP_ACTIVE, 0x50002D0},
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{DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
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{DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
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/* End of Display timings */
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{DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE},
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{DC_COM_PIN_OUTPUT_ENABLE(1), 0},
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -185,7 +185,7 @@ void gfx_putc(char c)
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u8 *cbuf = (u8 *)&_gfx_font[8 * (c - 32)];
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u32 *fb = gfx_ctxt.fb + gfx_con.x + gfx_con.y * gfx_ctxt.stride;
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for (u32 i = 0; i < 16; i+=2)
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for (u32 i = 0; i < 16; i += 2)
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{
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u8 v = *cbuf++;
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for (u32 k = 0; k < 2; k++)
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@ -254,7 +254,6 @@ void gfx_putc(char c)
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}
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break;
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}
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}
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void gfx_puts(const char *s)
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (C) 2018 M4xw
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018 M4xw
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -96,6 +96,7 @@ void check_sept()
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EPRINTF("Failed to init eMMC.");
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goto out_free;
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}
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emummc_storage_set_mmc_partition(&storage, 1);
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// Read package1.
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@ -422,7 +422,6 @@ void launch_tools()
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goto out;
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}
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if (file_sec)
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{
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memcpy(dir + strlen(dir), "/", 2);
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@ -915,7 +914,6 @@ void auto_launch_firmware()
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break;
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boot_entry_id++;
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}
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}
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}
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright 2014 Google Inc.
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,7 +1,7 @@
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/*
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* Battery charger driver for Nintendo Switch's TI BQ24193
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*
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,7 +1,7 @@
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/*
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* Battery charger driver for Nintendo Switch's TI BQ24193
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*
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,9 +1,9 @@
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/*
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* Fuel gauge driver for Nintendo Switch's Maxim 17050
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*
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* Copyright (C) 2011 Samsung Electronics
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* Copyright (c) 2011 Samsung Electronics
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* MyungJoo Ham <myungjoo.ham@samsung.com>
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -2,9 +2,9 @@
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* Fuel gauge driver for Nintendo Switch's Maxim 17050
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* Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
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*
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* Copyright (C) 2011 Samsung Electronics
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* Copyright (c) 2011 Samsung Electronics
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* MyungJoo Ham <myungjoo.ham@samsung.com>
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -1,7 +1,7 @@
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/*
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* Defining registers address and its bit definitions of MAX77620 and MAX20024
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*
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* Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016 NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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@ -209,6 +209,7 @@
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#define SE_INT_OP_DONE(x) (x << SE_INT_OP_DONE_SHIFT)
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#define SE_INT_ERROR_SHIFT 16
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#define SE_INT_ERROR(x) (x << SE_INT_ERROR_SHIFT)
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#define SE_STATUS_0 0x800
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#define SE_ERR_STATUS_0 0x804
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TEGRA_SE_RNG_DT_SIZE)
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#define TEGRA_SE_AES_CMAC_DIGEST_SIZE 16
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#define TEGRA_SE_RSA512_DIGEST_SIZE 64
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#define TEGRA_SE_RSA512_DIGEST_SIZE 64
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#define TEGRA_SE_RSA1024_DIGEST_SIZE 128
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#define TEGRA_SE_RSA1536_DIGEST_SIZE 192
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#define TEGRA_SE_RSA2048_DIGEST_SIZE 256
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@ -35,7 +35,7 @@ void uart_init(u32 idx, u32 baud)
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uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode.
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uart->UART_THR_DLAB = (u8)rate; // Divisor latch LSB.
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uart->UART_IER_DLAB = (u8)(rate >> 8); // Divisor latch MSB.
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uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Diable DLAB.
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uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Disable DLAB.
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// Setup and flush fifo.
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uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_RX_CLR | UART_IIR_FCR_TX_CLR;
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2019 CTCaer
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* Copyright (c) 2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2019 CTCaer
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* Copyright (c) 2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,8 +1,8 @@
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/*
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* include/linux/mmc/sd.h
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*
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* Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
|
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@ -1,8 +1,8 @@
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/*
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* Common Gfx Header
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (C) 2018 M4xw
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* Copyright (c) 2018 CTCaer
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* Copyright (c) 2018 M4xw
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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|
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@ -1,6 +1,6 @@
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/*
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* Common Module Header
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* Copyright (C) 2018 M4xw
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* Copyright (c) 2018 M4xw
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
|
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|
|
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright 2014 Google Inc.
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* Copyright (C) 2018 CTCaer
|
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* Copyright (c) 2018 CTCaer
|
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*
|
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms and conditions of the GNU General Public License,
|
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|
|
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@ -1,8 +1,8 @@
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/*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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* Copyright 2014 Google Inc.
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* Copyright (C) 2018 naehrwert
|
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* Copyright (C) 2018 CTCaer
|
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* Copyright (c) 2018 naehrwert
|
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* Copyright (c) 2018 CTCaer
|
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*
|
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms and conditions of the GNU General Public License,
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@ -7,7 +7,7 @@ For more, check [Here](https://github.com/CTCaer/minerva_tc).
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```
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Minerva Training Cell (C) 2018 CTCaer.
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Minerva Training Cell (c) 2018 CTCaer.
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/* Pain... And suffering. */
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```
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@ -1274,6 +1274,7 @@ static u32 _digital_dll_prelock(emc_table_t *mtc_table_entry, u32 needs_tristate
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EMC(EMC_DBG) |= 2u;
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EMC(EMC_CFG_DIG_DLL) &= 0xFFFFFFFE; //Disable CFG_DLL_EN: [PMC] Enable digital DLL.
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EMC(EMC_DBG) &= 0xFFFFFFFD;
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while (EMC(EMC_CFG_DIG_DLL) & 1)
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;
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if (dual_channel)
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@ -2575,7 +2576,6 @@ static void _save_train_results(emc_table_t *mtc_table_entry, u32 needs_training
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mtc_table_entry->burst_reg_per_ch.emc0_mrw12_idx = emc0_ib_vref_dq_byte8_modded_plus | 0x880E0000 | (emc0_mrw12_op_sp1 << 8);
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mtc_table_entry->burst_reg_per_ch.emc0_mrw13_idx = emc0_ib_vref_dq_byte9_modded_a_plus << 8 | emc0_mrw13_op_sp0 | mr13_dev_ext_cnt_sp_addr;
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mtc_table_entry->burst_reg_per_ch.emc1_mrw13_idx = (emc1_mrw13_op_sp1 << 8) | emc1_mrw13_op_sp0 | mr13_dev_ext_cnt_sp_addr;
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}
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}
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}
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@ -2756,7 +2756,7 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
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// Step 2 - Prelock the DLL.
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EPRINTF("Step 2");
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if (dst_emc_entry->burst_regs.emc_cfg_dig_dll_idx & 1)
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_digital_dll_prelock(dst_emc_entry, needs_tristate_training, selected_clk_src_emc); //Prelock enabled for target frequency.
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_digital_dll_prelock(dst_emc_entry, needs_tristate_training, selected_clk_src_emc); // Prelock enabled for target frequency.
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else
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{
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_change_dll_src(dst_emc_entry, selected_clk_src_emc);
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@ -3235,6 +3235,7 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
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ref_delay = (u32)(float)(tRP_src_timing + tRFC_src_timing + 20.0f);
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_ccfifo_write(EMC_CFG_SYNC, 0, ref_delay);
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_ccfifo_write(EMC_DBG, emc_dbg_val | 0x40000002, 0); // WRITE_MUX_ACTIVE | WRITE_ACTIVE_ONLY
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ramp_down_wait = _dvfs_power_ramp_down(false, src_emc_entry, dst_emc_entry, src_clock_period);
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// Step 12 - Trigger clock change.
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||||
|
@ -3246,6 +3247,7 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
|
|||
// Step 13 - Ramp up.
|
||||
EPRINTF("Step 13");
|
||||
ramp_up_wait = _dvfs_power_ramp_up(false, src_emc_entry, dst_emc_entry, needs_training & 0xFF, dst_clock_period);
|
||||
|
||||
_ccfifo_write(EMC_DBG, emc_dbg_val, 0);
|
||||
|
||||
// Step 14 - Bringup CKE pins.
|
||||
|
@ -3313,17 +3315,22 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
|
|||
T_PDEX_timing_final = 0;
|
||||
_ccfifo_write(EMC_ZQ_CAL, 0x80000001, T_PDEX_timing_final);
|
||||
}
|
||||
|
||||
T_PDEX_timing_final = zq_latch_dvfs_wait_time + T_PDEX_timing;
|
||||
|
||||
if ((zq_latch_dvfs_wait_time + T_PDEX_timing) < 0)
|
||||
T_PDEX_timing_final = 0;
|
||||
|
||||
_ccfifo_write(EMC_ZQ_CAL, 0x80000002, T_PDEX_timing_final);
|
||||
_ccfifo_write(EMC_ZQ_CAL, 0x40000001, 0);
|
||||
|
||||
if (!needs_tristate_training)
|
||||
{
|
||||
_ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xF3FFFFF7) | 0xC000000, 0);
|
||||
_ccfifo_write(EMC_SELF_REF, 0x100, 0);
|
||||
_ccfifo_write(EMC_REF, 0, 0);
|
||||
}
|
||||
|
||||
emc_zq_cal = 0x40000002;
|
||||
zq_latch_dvfs_wait_time = (s32)(float)(1000.0f / dst_clock_period);
|
||||
}
|
||||
|
@ -3334,17 +3341,20 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
|
|||
|
||||
if (src_clock_period > 2.0)
|
||||
_ccfifo_write(EMC_ZQ_CAL, 1, T_PDEX_timing);
|
||||
|
||||
if (!needs_tristate_training)
|
||||
{
|
||||
_ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xF3FFFFF7) | 0xC000000, T_PDEX_timing);
|
||||
_ccfifo_write(EMC_SELF_REF, 0x100, 0);
|
||||
_ccfifo_write(EMC_REF, 0, 0);
|
||||
}
|
||||
|
||||
emc_zq_cal = 2;
|
||||
|
||||
if (zq_latch_dvfs_wait_time < 0)
|
||||
zq_latch_dvfs_wait_time = 0;
|
||||
}
|
||||
|
||||
_ccfifo_write(EMC_ZQ_CAL, emc_zq_cal, (u32)zq_latch_dvfs_wait_time);
|
||||
}
|
||||
|
||||
|
@ -3422,6 +3432,7 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
|
|||
_ccfifo_write(EMC_INTSTATUS, 0, (u32)(float)(1000.0f / src_clock_period));
|
||||
_ccfifo_write(EMC_PMACRO_DATA_RX_TERM_MODE, src_emc_entry->burst_regs.emc_pmacro_data_rx_term_mode_idx, 0);
|
||||
}
|
||||
|
||||
_ccfifo_write(EMC_DBG, emc_dbg_o, 0);
|
||||
|
||||
if (opt_zcal_en_cc)
|
||||
|
@ -3566,6 +3577,7 @@ step_19_2:
|
|||
_ccfifo_write(EMC_SEL_DPD_CTRL, src_emc_entry->emc_sel_dpd_ctrl, 0);
|
||||
_ccfifo_write(EMC_DBG, emc_dbg_o, 0);
|
||||
_ccfifo_write(EMC_CFG_PIPE_CLK, emc_cfg_pipe_clk_o, 0);
|
||||
|
||||
if (bg_regulator_mode_change)
|
||||
{
|
||||
if (enable_bg_regulator)
|
||||
|
@ -3584,6 +3596,7 @@ step_19_2:
|
|||
EMC(EMC_CFG_DIG_DLL) = (EMC(EMC_CFG_DIG_DLL) & 0xFFFFFF24) | 0x88;
|
||||
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = selected_clk_src_emc;
|
||||
|
||||
if (_wait_emc_status(EMC_INTSTATUS, CLKCHANGE_COMPLETE_INT, true, 0))
|
||||
return 4; // Clkchange handshake timeout error.
|
||||
|
||||
|
@ -3916,12 +3929,15 @@ s32 _minerva_set_rate(mtc_config_t *mtc_cfg)
|
|||
if (mtc_cfg->rate_to == table_entry_rate)
|
||||
dst_emc_entry_idx = i;
|
||||
}
|
||||
|
||||
src_emc_entry = (emc_table_t *)&mtc_cfg->mtc_table[src_emc_entry_idx];
|
||||
dst_emc_entry = (emc_table_t *)&mtc_cfg->mtc_table[dst_emc_entry_idx];
|
||||
|
||||
s32 src_rate_khz = src_emc_entry->rate_khz;
|
||||
s32 dst_rate_khz = dst_emc_entry->rate_khz;
|
||||
u32 src_clk_src_emc = src_emc_entry->clk_src_emc;
|
||||
u32 dst_clk_src_emc = dst_emc_entry->clk_src_emc;
|
||||
|
||||
if (mtc_cfg->table_entries > 900)
|
||||
return 4;
|
||||
|
||||
|
@ -4028,7 +4044,7 @@ void _minerva_init(mtc_config_t *mtc_cfg, void* bp)
|
|||
return;
|
||||
}
|
||||
|
||||
// If this is set, it need to be managed. Changing freq from OC to a lower
|
||||
// If this is set, it needs to be managed. Changing freq from OC to a lower
|
||||
// must have the rate_from set to 2131200 and not 1600000
|
||||
// bool overclock = true;
|
||||
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -254,7 +254,6 @@ void gfx_putc(gfx_con_t *con, char c)
|
|||
}
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void gfx_puts(gfx_con_t *con, const char *s)
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (C) 2018 M4xw
|
||||
* Copyright (c) 2018 CTCaer
|
||||
* Copyright (c) 2018 M4xw
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -402,7 +402,6 @@ void nyx_window_toggle_buttons(lv_obj_t *win, bool disable)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
lv_obj_t *nyx_create_standard_window(const char *win_title)
|
||||
{
|
||||
static lv_style_t win_bg_style;
|
||||
|
|
|
@ -55,7 +55,7 @@ static void _create_window_emummc()
|
|||
//Disable buttons.
|
||||
nyx_window_toggle_buttons(win, true);
|
||||
|
||||
// Chreate important info container.
|
||||
// Create important info container.
|
||||
lv_obj_t *h1 = lv_cont_create(win, NULL);
|
||||
lv_cont_set_fit(h1, false, true);
|
||||
lv_obj_set_width(h1, (LV_HOR_RES / 9) * 5);
|
||||
|
@ -728,7 +728,6 @@ static lv_res_t _save_disable_emummc_cfg_action(lv_obj_t * btn)
|
|||
_create_emummc_saved_mbox();
|
||||
sd_unmount(false);
|
||||
|
||||
|
||||
return LV_RES_INV;
|
||||
}
|
||||
|
||||
|
|
|
@ -258,6 +258,7 @@ void display_color_screen(u32 color)
|
|||
DISPLAY_A(_DIREG(DC_WIN_CD_WIN_OPTIONS)) = 0;
|
||||
DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color;
|
||||
DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = (DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE) | GENERAL_ACT_REQ;
|
||||
|
||||
usleep(35000);
|
||||
|
||||
display_backlight(true);
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -415,7 +415,7 @@ static const cfg_op_t _display_config_11[113] = {
|
|||
{DC_DISP_SYNC_WIDTH, 0x10048},
|
||||
{DC_DISP_BACK_PORCH, 0x90048},
|
||||
{DC_DISP_ACTIVE, 0x50002D0},
|
||||
{DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
|
||||
{DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
|
||||
/* End of Display timings */
|
||||
{DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE},
|
||||
{DC_COM_PIN_OUTPUT_ENABLE(1), 0},
|
||||
|
@ -557,7 +557,7 @@ static const cfg_op_t cfg_display_framebuffer[32] = {
|
|||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_WIN_OPTIONS, 0},
|
||||
{DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, //DSI_ENABLE
|
||||
{DC_WIN_WIN_OPTIONS, WIN_ENABLE | V_DIRECTION}, //Enable window AD.
|
||||
{DC_WIN_WIN_OPTIONS, WIN_ENABLE | V_DIRECTION}, // Enable window AD.
|
||||
{DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, //DISPLAY_CTRL_MODE: continuous display.
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, //General update; window A update.
|
||||
{DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} //General activation request; window A activation request.
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -189,7 +189,7 @@ void gfx_putc(char c)
|
|||
u8 *cbuf = (u8 *)&_gfx_font[8 * (c - 32)];
|
||||
u32 *fb = gfx_ctxt.fb + gfx_con.x + gfx_con.y * gfx_ctxt.stride;
|
||||
|
||||
for (u32 i = 0; i < 16; i+=2)
|
||||
for (u32 i = 0; i < 16; i += 2)
|
||||
{
|
||||
u8 v = *cbuf++;
|
||||
for (u32 k = 0; k < 2; k++)
|
||||
|
@ -258,7 +258,6 @@ void gfx_putc(char c)
|
|||
}
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void gfx_puts(const char *s)
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018-2019 CTCaer
|
||||
* Copyright (C) 2018 M4xw
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018 M4xw
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -64,7 +64,6 @@ void get_als_lux(als_table_t *als_val)
|
|||
data[1] = i2c_recv_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_DATA1LOW_REG)) +
|
||||
(i2c_recv_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_DATA1HIGH_REG)) << 8);
|
||||
|
||||
|
||||
als_val->over_limit = data[0] > 65534 || data[1] > 65534;
|
||||
als_val->vi_light = data[0];
|
||||
als_val->ir_light = data[1];
|
||||
|
|
|
@ -42,7 +42,6 @@ extern "C" {
|
|||
prefix void * _lv_indev_list;\
|
||||
prefix void * _lv_disp_list;\
|
||||
|
||||
|
||||
#define LV_NO_PREFIX
|
||||
#define LV_ROOTS LV_GC_ROOTS(LV_NO_PREFIX)
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
|
||||
* Copyright 2014 Google Inc.
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Battery charger driver for Nintendo Switch's TI BQ24193
|
||||
*
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Battery charger driver for Nintendo Switch's TI BQ24193
|
||||
*
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,9 +1,9 @@
|
|||
/*
|
||||
* Fuel gauge driver for Nintendo Switch's Maxim 17050
|
||||
*
|
||||
* Copyright (C) 2011 Samsung Electronics
|
||||
* Copyright (c) 2011 Samsung Electronics
|
||||
* MyungJoo Ham <myungjoo.ham@samsung.com>
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -2,9 +2,9 @@
|
|||
* Fuel gauge driver for Nintendo Switch's Maxim 17050
|
||||
* Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
|
||||
*
|
||||
* Copyright (C) 2011 Samsung Electronics
|
||||
* Copyright (c) 2011 Samsung Electronics
|
||||
* MyungJoo Ham <myungjoo.ham@samsung.com>
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Defining registers address and its bit definitions of MAX77620 and MAX20024
|
||||
*
|
||||
* Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
|
||||
* Copyright (c) 2016 NVIDIA CORPORATION. All rights reserved.
|
||||
* Copyright (c) 2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
|
|
|
@ -209,6 +209,7 @@
|
|||
#define SE_INT_OP_DONE(x) (x << SE_INT_OP_DONE_SHIFT)
|
||||
#define SE_INT_ERROR_SHIFT 16
|
||||
#define SE_INT_ERROR(x) (x << SE_INT_ERROR_SHIFT)
|
||||
|
||||
#define SE_STATUS_0 0x800
|
||||
#define SE_ERR_STATUS_0 0x804
|
||||
|
||||
|
@ -254,7 +255,7 @@
|
|||
TEGRA_SE_RNG_DT_SIZE)
|
||||
|
||||
#define TEGRA_SE_AES_CMAC_DIGEST_SIZE 16
|
||||
#define TEGRA_SE_RSA512_DIGEST_SIZE 64
|
||||
#define TEGRA_SE_RSA512_DIGEST_SIZE 64
|
||||
#define TEGRA_SE_RSA1024_DIGEST_SIZE 128
|
||||
#define TEGRA_SE_RSA1536_DIGEST_SIZE 192
|
||||
#define TEGRA_SE_RSA2048_DIGEST_SIZE 256
|
||||
|
|
|
@ -30,7 +30,6 @@
|
|||
|
||||
extern sdmmc_t sd_sdmmc;
|
||||
|
||||
|
||||
void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
|
||||
{
|
||||
// Flush and disable MMU.
|
||||
|
|
|
@ -35,7 +35,7 @@ void uart_init(u32 idx, u32 baud)
|
|||
uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode.
|
||||
uart->UART_THR_DLAB = (u8)rate; // Divisor latch LSB.
|
||||
uart->UART_IER_DLAB = (u8)(rate >> 8); // Divisor latch MSB.
|
||||
uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Diable DLAB.
|
||||
uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Disable DLAB.
|
||||
|
||||
// Setup and flush fifo.
|
||||
uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_RX_CLR | UART_IIR_FCR_TX_CLR;
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
/*
|
||||
* include/linux/mmc/sd.h
|
||||
*
|
||||
* Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (C) 2018 CTCaer
|
||||
* Copyright (c) 2018 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
Loading…
Reference in a new issue