mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-22 18:06:40 +00:00
minerva: Make use of new minerva
- Training and switch is now faster - Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva - MTC table is now in a safe region - Periodic training period increased to every 250ms
This commit is contained in:
parent
66c4f30bdf
commit
84328aa676
10 changed files with 63 additions and 22 deletions
|
@ -34,8 +34,10 @@ void minerva_init()
|
|||
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
|
||||
// Set table to ram.
|
||||
mtc_cfg->mtc_table = NULL;
|
||||
// Set table to nyx storage.
|
||||
mtc_cfg->mtc_table = (emc_table_t *)&nyx_str->mtc_table;
|
||||
|
||||
mtc_cfg->init_done = MTC_NEW_MAGIC;
|
||||
mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
|
||||
u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
|
||||
minerva_cfg = (void *)ep_addr;
|
||||
|
@ -66,7 +68,7 @@ void minerva_change_freq(minerva_freq_t freq)
|
|||
return;
|
||||
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
if (minerva_cfg && (mtc_cfg->rate_from != freq))
|
||||
if (mtc_cfg->rate_from != freq)
|
||||
{
|
||||
mtc_cfg->rate_to = freq;
|
||||
mtc_cfg->train_mode = OP_SWITCH;
|
||||
|
@ -80,7 +82,7 @@ void minerva_periodic_training()
|
|||
return;
|
||||
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
if (minerva_cfg && mtc_cfg->rate_from == FREQ_1600)
|
||||
if (mtc_cfg->rate_from == FREQ_1600)
|
||||
{
|
||||
mtc_cfg->train_mode = OP_PERIODIC_TRAIN;
|
||||
minerva_cfg(mtc_cfg, NULL);
|
||||
|
|
|
@ -20,7 +20,10 @@
|
|||
#include "mtc_table.h"
|
||||
#include "../utils/types.h"
|
||||
|
||||
#define EMC_PERIODIC_TRAIN_MS 100
|
||||
#define MTC_INIT_MAGIC 0x3043544D
|
||||
#define MTC_NEW_MAGIC 0x5243544D
|
||||
|
||||
#define EMC_PERIODIC_TRAIN_MS 250
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
@ -35,6 +38,7 @@ typedef struct
|
|||
bool emc_2X_clk_src_is_pllmb;
|
||||
bool fsp_for_src_freq;
|
||||
bool train_ram_patterns;
|
||||
bool init_done;
|
||||
} mtc_config_t;
|
||||
|
||||
enum train_mode_t
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
#include "util.h"
|
||||
#include "../gfx/di.h"
|
||||
#include "../mem/minerva.h"
|
||||
#include "../power/max77620.h"
|
||||
#include "../rtc/max77620-rtc.h"
|
||||
#include "../soc/bpmp.h"
|
||||
|
@ -26,6 +27,8 @@
|
|||
|
||||
#define USE_RTC_TIMER
|
||||
|
||||
extern volatile nyx_storage_t *nyx_str;
|
||||
|
||||
extern void sd_unmount();
|
||||
|
||||
u32 get_tmr_s()
|
||||
|
@ -100,6 +103,8 @@ void reboot_normal()
|
|||
sd_unmount();
|
||||
display_end();
|
||||
|
||||
nyx_str->mtc_cfg.init_done = 0;
|
||||
|
||||
panic(0x21); // Bypass fuse programming in package1.
|
||||
}
|
||||
|
||||
|
@ -110,6 +115,8 @@ void reboot_rcm()
|
|||
sd_unmount();
|
||||
display_end();
|
||||
|
||||
nyx_str->mtc_cfg.init_done = 0;
|
||||
|
||||
PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
|
||||
PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
|
||||
|
||||
|
|
|
@ -41,6 +41,7 @@ typedef struct _nyx_storage_t
|
|||
u8 hekate[0x30000];
|
||||
u8 rsvd[0x800000];
|
||||
mtc_config_t mtc_cfg;
|
||||
emc_table_t mtc_table;
|
||||
} nyx_storage_t;
|
||||
|
||||
u32 get_tmr_us();
|
||||
|
|
|
@ -30,7 +30,9 @@
|
|||
#define EMC_BASE 0x7001B000
|
||||
#define EMC0_BASE 0x7001E000
|
||||
#define EMC1_BASE 0x7001F000
|
||||
#define MTC_TABLE 0x8F000000
|
||||
|
||||
#define MTC_INIT_MAGIC 0x3043544D
|
||||
#define MTC_NEW_MAGIC 0x5243544D
|
||||
|
||||
#define _REG(base, off) *(vu32 *)((base) + (off))
|
||||
|
||||
|
@ -61,6 +63,7 @@ typedef struct
|
|||
bool emc_2X_clk_src_is_pllmb;
|
||||
bool fsp_for_src_freq;
|
||||
bool train_ram_patterns;
|
||||
bool init_done;
|
||||
} mtc_config_t;
|
||||
|
||||
enum train_mode_t
|
||||
|
|
|
@ -3857,19 +3857,17 @@ static void _minerva_get_table(mtc_config_t *mtc_cfg)
|
|||
switch (mtc_cfg->sdram_id)
|
||||
{
|
||||
case 1:
|
||||
memcpy((void *)MTC_TABLE, nx_abca2_2_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
|
||||
memcpy(mtc_cfg->mtc_table, nx_abca2_2_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
|
||||
break;
|
||||
case 0:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
default:
|
||||
memcpy((void *)MTC_TABLE, nx_abca2_0_3_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
|
||||
memcpy(mtc_cfg->mtc_table, nx_abca2_0_3_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
|
||||
break;
|
||||
}
|
||||
|
||||
mtc_cfg->mtc_table = (emc_table_t *)MTC_TABLE;
|
||||
|
||||
mtc_cfg->table_entries = 10;
|
||||
mtc_cfg->rate_to = 0;
|
||||
mtc_cfg->rate_from = 0;
|
||||
|
@ -3881,6 +3879,7 @@ static void _minerva_get_table(mtc_config_t *mtc_cfg)
|
|||
mtc_cfg->emc_2X_clk_src_is_pllmb = false;
|
||||
mtc_cfg->fsp_for_src_freq = false;
|
||||
mtc_cfg->train_ram_patterns = true;
|
||||
mtc_cfg->init_done = MTC_INIT_MAGIC;
|
||||
}
|
||||
|
||||
void _minerva_init(mtc_config_t *mtc_cfg, void* bp)
|
||||
|
@ -3891,9 +3890,10 @@ void _minerva_init(mtc_config_t *mtc_cfg, void* bp)
|
|||
fsp_for_src_freq = mtc_cfg->fsp_for_src_freq;
|
||||
emc_2X_clk_src_is_pllmb = mtc_cfg->emc_2X_clk_src_is_pllmb;
|
||||
|
||||
if (!mtc_cfg->mtc_table)
|
||||
if (mtc_cfg->init_done != MTC_INIT_MAGIC)
|
||||
{
|
||||
_minerva_get_table(mtc_cfg);
|
||||
if (mtc_cfg->init_done == MTC_NEW_MAGIC)
|
||||
_minerva_get_table(mtc_cfg);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -34,23 +34,32 @@ void minerva_init()
|
|||
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
|
||||
// Set table to nyx storage.
|
||||
mtc_cfg->mtc_table = (emc_table_t *)&nyx_str->mtc_table;
|
||||
|
||||
// Set table to ram.
|
||||
if (!(mtc_cfg->table_entries == 10))
|
||||
if (mtc_cfg->init_done == MTC_INIT_MAGIC)
|
||||
{
|
||||
mtc_cfg->mtc_table = NULL;
|
||||
mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
|
||||
mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
|
||||
u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
|
||||
minerva_cfg = (void *)ep_addr;
|
||||
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
mtc_config_t mtc_tmp;
|
||||
mtc_tmp.mtc_table = NULL;
|
||||
mtc_tmp.mtc_table = mtc_cfg->mtc_table;
|
||||
mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
|
||||
mtc_tmp.init_done = MTC_NEW_MAGIC;
|
||||
u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
|
||||
minerva_cfg = (void *)ep_addr;
|
||||
|
||||
return;
|
||||
if (mtc_tmp.init_done == MTC_INIT_MAGIC)
|
||||
minerva_cfg = (void *)ep_addr;
|
||||
|
||||
// Copy Minerva context to Nyx storage.
|
||||
if (minerva_cfg)
|
||||
memcpy(mtc_cfg, (void *)&mtc_tmp, sizeof(mtc_config_t));
|
||||
}
|
||||
|
||||
if (!minerva_cfg)
|
||||
|
@ -79,7 +88,7 @@ void minerva_change_freq(minerva_freq_t freq)
|
|||
return;
|
||||
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
if (minerva_cfg && (mtc_cfg->rate_from != freq))
|
||||
if (mtc_cfg->rate_from != freq)
|
||||
{
|
||||
mtc_cfg->rate_to = freq;
|
||||
mtc_cfg->train_mode = OP_SWITCH;
|
||||
|
|
|
@ -20,7 +20,10 @@
|
|||
#include "mtc_table.h"
|
||||
#include "../utils/types.h"
|
||||
|
||||
#define EMC_PERIODIC_TRAIN_MS 100
|
||||
#define MTC_INIT_MAGIC 0x3043544D
|
||||
#define MTC_NEW_MAGIC 0x5243544D
|
||||
|
||||
#define EMC_PERIODIC_TRAIN_MS 250
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
@ -35,6 +38,7 @@ typedef struct
|
|||
bool emc_2X_clk_src_is_pllmb;
|
||||
bool fsp_for_src_freq;
|
||||
bool train_ram_patterns;
|
||||
bool init_done;
|
||||
} mtc_config_t;
|
||||
|
||||
enum train_mode_t
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
#include "util.h"
|
||||
#include "../gfx/di.h"
|
||||
#include "../mem/minerva.h"
|
||||
#include "../power/max77620.h"
|
||||
#include "../soc/bpmp.h"
|
||||
#include "../soc/i2c.h"
|
||||
|
@ -25,6 +26,8 @@
|
|||
|
||||
#define USE_RTC_TIMER
|
||||
|
||||
extern volatile nyx_storage_t *nyx_str;
|
||||
|
||||
extern void sd_unmount(bool deinit);
|
||||
|
||||
u32 get_tmr_s()
|
||||
|
@ -99,6 +102,8 @@ void reboot_normal()
|
|||
sd_unmount(true);
|
||||
display_end();
|
||||
|
||||
nyx_str->mtc_cfg.init_done = 0;
|
||||
|
||||
panic(0x21); // Bypass fuse programming in package1.
|
||||
}
|
||||
|
||||
|
@ -109,6 +114,8 @@ void reboot_rcm()
|
|||
sd_unmount(true);
|
||||
display_end();
|
||||
|
||||
nyx_str->mtc_cfg.init_done = 0;
|
||||
|
||||
PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
|
||||
PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
|
||||
|
||||
|
@ -121,6 +128,9 @@ void power_off()
|
|||
sd_unmount(true);
|
||||
display_end();
|
||||
|
||||
// Stop the alarm, in case we injected and powered off too fast.
|
||||
max77620_rtc_stop_alarm();
|
||||
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
|
||||
|
||||
while (true)
|
||||
|
|
|
@ -41,6 +41,7 @@ typedef struct _nyx_storage_t
|
|||
u8 hekate[0x30000];
|
||||
u8 rsvd[0x800000];
|
||||
mtc_config_t mtc_cfg;
|
||||
emc_table_t mtc_table;
|
||||
} nyx_storage_t;
|
||||
|
||||
u32 get_tmr_us();
|
||||
|
|
Loading…
Reference in a new issue