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l4t: bump loader/firmware revisions

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CTCaer 2024-03-27 09:50:11 +02:00
parent c9ff5179f9
commit 9567ba19c8

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@ -33,9 +33,12 @@
* 1: SDMMC1 LA programming for SDMMC1 UHS DDR200. * 1: SDMMC1 LA programming for SDMMC1 UHS DDR200.
* 2: Arachne Register Cell v1. * 2: Arachne Register Cell v1.
* 3: Arachne Register Cell v2. PTSA Rework support. * 3: Arachne Register Cell v2. PTSA Rework support.
* 4: Arachne Register Cell v3. DRAM OPT and DDR200 changes.
* 5: Arachne Register Cell v4. DRAM FREQ and DDR200 changes.
*/ */
#define L4T_LOADER_API_REV 4
#define L4T_FIRMWARE_REV 0x34524556 // REV4. #define L4T_LOADER_API_REV 5
#define L4T_FIRMWARE_REV 0x35524556 // REV5.
#ifdef DEBUG_UART_PORT #ifdef DEBUG_UART_PORT
#include <soc/uart.h> #include <soc/uart.h>