mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-26 11:42:09 +00:00
ianos: Remove sd (un)mount usage
This commit is contained in:
parent
5790c585f5
commit
bb2b339b54
7 changed files with 19 additions and 35 deletions
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@ -63,26 +63,20 @@ static bool _ianos_read_cb(el_ctx *ctx, void *dest, size_t numberBytes, size_t o
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}
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}
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//TODO: Support shared libraries.
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//TODO: Support shared libraries.
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uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void *moduleConfig)
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uintptr_t ianos_loader(char *path, elfType_t type, void *moduleConfig)
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{
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{
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el_ctx ctx;
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uintptr_t epaddr = 0;
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uintptr_t epaddr = 0;
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if (sdmount)
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if (!sd_mount())
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{
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goto elfLoadFinalOut;
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if (!sd_mount())
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goto elfLoadFinalOut;
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}
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// Read library.
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fileBuf = sd_file_read(path, NULL);
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fileBuf = sd_file_read(path, NULL);
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if (sdmount)
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sd_end();
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if (!fileBuf)
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if (!fileBuf)
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goto elfLoadFinalOut;
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goto elfLoadFinalOut;
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el_ctx ctx;
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ctx.pread = _ianos_read_cb;
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ctx.pread = _ianos_read_cb;
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if (el_init(&ctx))
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if (el_init(&ctx))
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@ -94,7 +88,6 @@ uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void *moduleCon
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case EXEC_ELF:
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case EXEC_ELF:
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case AR64_ELF:
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case AR64_ELF:
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elfBuf = (void *)DRAM_LIB_ADDR;
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elfBuf = (void *)DRAM_LIB_ADDR;
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sd_end();
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break;
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break;
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default:
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default:
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elfBuf = malloc(ctx.memsz); // Aligned to 0x10 by default.
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elfBuf = malloc(ctx.memsz); // Aligned to 0x10 by default.
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@ -123,6 +116,5 @@ elfFreeOut:
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fileBuf = NULL;
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fileBuf = NULL;
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elfLoadFinalOut:
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elfLoadFinalOut:
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return epaddr;
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return epaddr;
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}
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}
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@ -29,6 +29,6 @@ typedef enum
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KEEP_IN_RAM = (1 << 31) // Shared library mask.
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KEEP_IN_RAM = (1 << 31) // Shared library mask.
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} elfType_t;
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} elfType_t;
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uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void* config);
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uintptr_t ianos_loader(char *path, elfType_t type, void* config);
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#endif
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#endif
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@ -1474,7 +1474,7 @@ void ipl_main()
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sd_mount();
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sd_mount();
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// Save sdram lp0 config.
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// Save sdram lp0 config.
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if (!ianos_loader(false, "bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params_patched()))
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if (!ianos_loader("bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params_patched()))
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h_cfg.errors |= ERR_LIBSYS_LP0;
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h_cfg.errors |= ERR_LIBSYS_LP0;
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// Train DRAM and switch to max frequency.
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// Train DRAM and switch to max frequency.
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@ -45,7 +45,7 @@ u32 minerva_init()
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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{
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{
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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minerva_cfg = (void *)ep_addr;
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minerva_cfg = (void *)ep_addr;
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return 0;
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return 0;
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@ -58,7 +58,7 @@ u32 minerva_init()
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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// Ensure that Minerva is new.
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// Ensure that Minerva is new.
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if (mtc_tmp.init_done == MTC_INIT_MAGIC)
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if (mtc_tmp.init_done == MTC_INIT_MAGIC)
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@ -79,7 +79,7 @@ u32 minerva_init()
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
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mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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// Ensure that Minerva is new.
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// Ensure that Minerva is new.
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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@ -63,26 +63,20 @@ static bool _ianos_read_cb(el_ctx *ctx, void *dest, size_t numberBytes, size_t o
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}
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}
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//TODO: Support shared libraries.
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//TODO: Support shared libraries.
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uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void *moduleConfig)
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uintptr_t ianos_loader(char *path, elfType_t type, void *moduleConfig)
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{
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{
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el_ctx ctx;
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uintptr_t epaddr = 0;
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uintptr_t epaddr = 0;
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if (sdmount)
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if (!sd_mount())
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{
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goto elfLoadFinalOut;
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if (!sd_mount())
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goto elfLoadFinalOut;
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}
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// Read library.
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fileBuf = sd_file_read(path, NULL);
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fileBuf = sd_file_read(path, NULL);
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if (sdmount)
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sd_end();
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if (!fileBuf)
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if (!fileBuf)
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goto elfLoadFinalOut;
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goto elfLoadFinalOut;
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el_ctx ctx;
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ctx.pread = _ianos_read_cb;
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ctx.pread = _ianos_read_cb;
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if (el_init(&ctx))
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if (el_init(&ctx))
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@ -94,7 +88,6 @@ uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void *moduleCon
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case EXEC_ELF:
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case EXEC_ELF:
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case AR64_ELF:
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case AR64_ELF:
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elfBuf = (void *)DRAM_LIB_ADDR;
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elfBuf = (void *)DRAM_LIB_ADDR;
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sd_end;
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break;
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break;
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default:
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default:
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elfBuf = malloc(ctx.memsz); // Aligned to 0x10 by default.
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elfBuf = malloc(ctx.memsz); // Aligned to 0x10 by default.
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@ -123,6 +116,5 @@ elfFreeOut:
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fileBuf = NULL;
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fileBuf = NULL;
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elfLoadFinalOut:
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elfLoadFinalOut:
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return epaddr;
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return epaddr;
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}
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}
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@ -29,6 +29,6 @@ typedef enum
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KEEP_IN_RAM = (1 << 31) // Shared library mask.
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KEEP_IN_RAM = (1 << 31) // Shared library mask.
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} elfType_t;
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} elfType_t;
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uintptr_t ianos_loader(bool sdmount, char *path, elfType_t type, void* config);
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uintptr_t ianos_loader(char *path, elfType_t type, void* config);
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#endif
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#endif
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@ -45,7 +45,7 @@ u32 minerva_init()
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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{
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{
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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minerva_cfg = (void *)ep_addr;
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minerva_cfg = (void *)ep_addr;
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return 0;
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return 0;
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@ -58,7 +58,7 @@ u32 minerva_init()
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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// Ensure that Minerva is new.
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// Ensure that Minerva is new.
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if (mtc_tmp.init_done == MTC_INIT_MAGIC)
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if (mtc_tmp.init_done == MTC_INIT_MAGIC)
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@ -79,7 +79,7 @@ u32 minerva_init()
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
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mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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// Ensure that Minerva is new.
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// Ensure that Minerva is new.
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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