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bdk: xusb: improve clock deinit
Allows L4T to use XUSB on T210B01 after a UMS usage. T210 somehow was fine.
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parent
197ce4c76f
commit
d08fac5a08
2 changed files with 23 additions and 14 deletions
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@ -38,8 +38,8 @@
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typedef enum
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{
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USB_HW_EP0 = 0,
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USB_HW_EP1 = 1
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USB_HW_EP0 = 0,
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USB_HW_EP1 = 1
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} usb_hw_ep_t;
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typedef enum
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@ -770,9 +770,6 @@ static void _xusbd_ep1_disable(u32 ep_idx)
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// Set EP state to disabled.
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ep_ctxt->ep_state = EP_DISABLED;
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// Clear EP context.
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memset((void *)ep_ctxt, 0, sizeof(xusb_ep_ctx_t));
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// Wait for EP status to change.
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_xusb_xhci_mask_wait(XUSB_DEV_XHCI_EP_STCHG, ep_mask, ep_mask, 1000);
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@ -973,27 +970,39 @@ int xusb_device_init()
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//! TODO: Power down more stuff.
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static void _xusb_device_power_down()
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{
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// Disable clock for XUSB Super-Speed and set source to CLK_M.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_SS);
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_SS) &= 0x1FFFFF00;
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usleep(2);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB_SS);
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// Put XUSB device into reset.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = BIT(CLK_U_XUSB_DEV);
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usleep(2);
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// Reset Full-Speed clock source to CLK_M and div1.
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_FS) = 0;
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usleep(2);
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// Disable XUSB device clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = BIT(CLK_U_XUSB_DEV);
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// Force UTMIP_PLL power down.
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CLOCK(CLK_RST_CONTROLLER_UTMIP_PLL_CFG1) &= (~BIT(15));
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CLOCK(CLK_RST_CONTROLLER_UTMIP_PLL_CFG2) |= BIT(4) | BIT(0); // UTMIP_FORCE_PD_SAMP_A/C_POWERDOWN.
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// Force enable UTMIPLL IDDQ.
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CLOCK(CLK_RST_CONTROLLER_UTMIPLL_HW_PWRDN_CFG0) |= 3;
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// Disable clocks for XUSB device and Super-Speed logic.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_SS);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB_SS);
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// Disable PLLU.
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clock_disable_pllu();
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// Set XUSB_PADCTL clock reset.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_PADCTL);
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// Disable XUSB clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB);
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// Disable PLLU.
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clock_disable_pllu();
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB);
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}
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static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
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