mirrors/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-29 21:12:06 +00:00
Code Issues Releases Activity

display: Add new Switch Lite panel support

Browse source
This commit is contained in:
CTCaer 2020-12-02 01:53:00 +02:00
parent 19ddff299a
commit d1e3a0fdff
3 changed files with 31 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

26
bdk/gfx/di.c
View file

@ -234,6 +234,7 @@ void display_init()
case PANEL_INL_2J055IA_27A: case PANEL_INL_2J055IA_27A:
case PANEL_AUO_A055TAN01: case PANEL_AUO_A055TAN01:
case PANEL_V40_55_UNK:
default: // Allow spare part displays to work. default: // Allow spare part displays to work.
_display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 120000); _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 120000);
break; break;
@ -370,6 +371,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit)
case PANEL_INL_2J055IA_27A: case PANEL_INL_2J055IA_27A:
case PANEL_AUO_A055TAN01: case PANEL_AUO_A055TAN01:
case PANEL_V40_55_UNK:
// Unlock extension cmds. // Unlock extension cmds.
DSI(_DSIREG(DSI_WR_DATA)) = 0x439; // MIPI_DSI_DCS_LONG_WRITE: 4 bytes. DSI(_DSIREG(DSI_WR_DATA)) = 0x439; // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
DSI(_DSIREG(DSI_WR_DATA)) = 0x9483FFB9; // MIPI_DCS_PRIV_SET_EXTC. (Pass: FF 83 94). DSI(_DSIREG(DSI_WR_DATA)) = 0x9483FFB9; // MIPI_DCS_PRIV_SET_EXTC. (Pass: FF 83 94).
@ -380,11 +382,22 @@ static void _display_panel_and_hw_end(bool no_panel_deinit)
DSI(_DSIREG(DSI_WR_DATA)) = 0xB39; // MIPI_DSI_DCS_LONG_WRITE: 11 bytes. DSI(_DSIREG(DSI_WR_DATA)) = 0xB39; // MIPI_DSI_DCS_LONG_WRITE: 11 bytes.
if (_display_id == PANEL_INL_2J055IA_27A) if (_display_id == PANEL_INL_2J055IA_27A)
DSI(_DSIREG(DSI_WR_DATA)) = 0x751548B1; // MIPI_DCS_PRIV_SET_POWER_CONTROL. (Not deep standby, BT5 / XDK, VRH gamma volt adj 53 / x40). DSI(_DSIREG(DSI_WR_DATA)) = 0x751548B1; // MIPI_DCS_PRIV_SET_POWER_CONTROL. (Not deep standby, BT5 / XDK, VRH gamma volt adj 53 / x40).
else else if (_display_id == PANEL_AUO_A055TAN01)
DSI(_DSIREG(DSI_WR_DATA)) = 0x711148B1; // MIPI_DCS_PRIV_SET_POWER_CONTROL. (Not deep standby, BT1 / XDK, VRH gamma volt adj 49 / x40). DSI(_DSIREG(DSI_WR_DATA)) = 0x711148B1; // MIPI_DCS_PRIV_SET_POWER_CONTROL. (Not deep standby, BT1 / XDK, VRH gamma volt adj 49 / x40).
// (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/32, Enter standby / PON / VCOMG). else // PANEL_V40_55_UNK.
DSI(_DSIREG(DSI_WR_DATA)) = 0x71143209; DSI(_DSIREG(DSI_WR_DATA)) = 0x731348B1; // MIPI_DCS_PRIV_SET_POWER_CONTROL. (Not deep standby, BT3 / XDK, VRH gamma volt adj 51 / x40).
DSI(_DSIREG(DSI_WR_DATA)) = 0x114D31; // (Unknown). if (_display_id == PANEL_INL_2J055IA_27A || _display_id == PANEL_AUO_A055TAN01)
{
// (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/32, Enter standby / PON / VCOMG).
DSI(_DSIREG(DSI_WR_DATA)) = 0x71143209;
DSI(_DSIREG(DSI_WR_DATA)) = 0x114D31; // (Unknown).
}
else // PANEL_V40_55_UNK.
{
// (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/48, Enter standby / PON / VCOMG).
DSI(_DSIREG(DSI_WR_DATA)) = 0x71243209;
DSI(_DSIREG(DSI_WR_DATA)) = 0x004C31; // (Unknown).
}
DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST; DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
usleep(5000); usleep(5000);
break; break;
@ -424,6 +437,11 @@ skip_panel_deinit:
void display_end() { _display_panel_and_hw_end(false); }; void display_end() { _display_panel_and_hw_end(false); };
u16 display_get_decoded_lcd_id()
{
return _display_id;
}
void display_color_screen(u32 color) void display_color_screen(u32 color)
{ {
exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_one_color, 8); exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_one_color, 8);

8
bdk/gfx/di.h
View file

@ -515,6 +515,7 @@
* 5.5" panels for Hoag skus: * 5.5" panels for Hoag skus:
* [20] 94 [10]: InnoLux 2J055IA-27A (Rev B1) * [20] 94 [10]: InnoLux 2J055IA-27A (Rev B1)
* [30] XX [10]: AUO A055TAN01 (59.05A30.001) [UNCONFIRMED ID] * [30] XX [10]: AUO A055TAN01 (59.05A30.001) [UNCONFIRMED ID]
* [40] XX [10]: Vendor 40 [UNCONFIRMED ID]
*/ */
/* Display ID Decoding: /* Display ID Decoding:
@ -527,6 +528,7 @@
* 10h: Japan Display Inc. * 10h: Japan Display Inc.
* 20h: InnoLux Corporation * 20h: InnoLux Corporation
* 30h: AU Optronics * 30h: AU Optronics
* 40h: Unknown1
* *
* Boards, Panel Size: * Boards, Panel Size:
* 0Fh: Icosa/Iowa, 6.2" * 0Fh: Icosa/Iowa, 6.2"
@ -541,13 +543,17 @@ enum
PANEL_INL_P062CCA_AZ1 = 0x0F20, PANEL_INL_P062CCA_AZ1 = 0x0F20,
PANEL_AUO_A062TAN01 = 0x0F30, PANEL_AUO_A062TAN01 = 0x0F30,
PANEL_INL_2J055IA_27A = 0x1020, PANEL_INL_2J055IA_27A = 0x1020,
PANEL_AUO_A055TAN01 = 0x1030 PANEL_AUO_A055TAN01 = 0x1030,
PANEL_V40_55_UNK = 0x1040
}; };
void display_init(); void display_init();
void display_backlight_pwm_init(); void display_backlight_pwm_init();
void display_end(); void display_end();
/*! Get Display panel ID. */
u16 display_get_decoded_lcd_id();
/*! Show one single color on the display. */ /*! Show one single color on the display. */
void display_color_screen(u32 color); void display_color_screen(u32 color);

2
bootloader/hos/hos.h
View file

@ -90,6 +90,8 @@ typedef struct _launch_ctxt_t
u32 warmboot_size; u32 warmboot_size;
void *secmon; void *secmon;
u32 secmon_size; u32 secmon_size;
void *exofatal;
u32 exofatal_size;
void *pkg2; void *pkg2;
u32 pkg2_size; u32 pkg2_size;