mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-22 18:06:40 +00:00
448 lines
26 KiB
Modula-2
Executable file
448 lines
26 KiB
Modula-2
Executable file
MC_INTSTATUS 0
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MC_INTMASK 4
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MC_ERR_STATUS 8
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MC_ERR_ADR c
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MC_PCFIFO_CLIENT_CONFIG0 dd0
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MC_PCFIFO_CLIENT_CONFIG1 dd4
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MC_PCFIFO_CLIENT_CONFIG2 dd8
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MC_PCFIFO_CLIENT_CONFIG3 ddc
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MC_PCFIFO_CLIENT_CONFIG4 de0
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MC_EMEM_CFG 50
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MC_EMEM_ADR_CFG 54
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MC_EMEM_ADR_CFG_DEV0 58
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MC_EMEM_ADR_CFG_DEV1 5c
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MC_EMEM_ADR_CFG_CHANNEL_MASK 60
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MC_EMEM_ADR_CFG_BANK_MASK_0 64
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MC_EMEM_ADR_CFG_BANK_MASK_1 68
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MC_EMEM_ADR_CFG_BANK_MASK_2 6c
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MC_SECURITY_CFG0 70
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MC_SECURITY_CFG1 74
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MC_SECURITY_CFG3 9bc
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MC_SECURITY_RSV 7c
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MC_EMEM_ARB_CFG 90
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MC_EMEM_ARB_OUTSTANDING_REQ 94
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MC_EMEM_ARB_TIMING_RCD 98
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MC_EMEM_ARB_TIMING_RP 9c
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MC_EMEM_ARB_TIMING_RC a0
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MC_EMEM_ARB_TIMING_RAS a4
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MC_EMEM_ARB_TIMING_FAW a8
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MC_EMEM_ARB_TIMING_RRD ac
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MC_EMEM_ARB_TIMING_RAP2PRE b0
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MC_EMEM_ARB_TIMING_WAP2PRE b4
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MC_EMEM_ARB_TIMING_R2R b8
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MC_EMEM_ARB_TIMING_W2W bc
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MC_EMEM_ARB_TIMING_R2W c0
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MC_EMEM_ARB_TIMING_W2R c4
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MC_EMEM_ARB_TIMING_RFCPB 6c0
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MC_EMEM_ARB_TIMING_CCDMW 6c4
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MC_EMEM_ARB_REFPB_HP_CTRL 6f0
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MC_EMEM_ARB_REFPB_BANK_CTRL 6f4
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MC_EMEM_ARB_DA_TURNS d0
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MC_EMEM_ARB_DA_COVERS d4
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MC_EMEM_ARB_MISC0 d8
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MC_EMEM_ARB_MISC1 dc
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MC_EMEM_ARB_MISC2 c8
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MC_EMEM_ARB_RING1_THROTTLE e0
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MC_EMEM_ARB_RING3_THROTTLE e4
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MC_EMEM_ARB_NISO_THROTTLE 6b0
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MC_EMEM_ARB_OVERRIDE e8
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MC_EMEM_ARB_RSV ec
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MC_CLKEN_OVERRIDE f4
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MC_TIMING_CONTROL_DBG f8
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MC_TIMING_CONTROL fc
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MC_STAT_CONTROL 100
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MC_STAT_STATUS 104
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MC_STAT_EMC_CLOCK_LIMIT 108
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MC_STAT_EMC_CLOCK_LIMIT_MSBS 10c
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MC_STAT_EMC_CLOCKS 110
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MC_STAT_EMC_CLOCKS_MSBS 114
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MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO 118
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MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO 158
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MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI 11c
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MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI 15c
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MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER a20
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MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER a24
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MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_LO 198
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MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_LO 1a8
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MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_HI 19c
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MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_HI 1ac
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MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_UPPER a28
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MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_UPPER a2c
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MC_STAT_EMC_FILTER_SET0_ASID 1a0
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MC_STAT_EMC_FILTER_SET1_ASID 1b0
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MC_STAT_EMC_FILTER_SET0_SLACK_LIMIT 120
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MC_STAT_EMC_FILTER_SET1_SLACK_LIMIT 160
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MC_STAT_EMC_FILTER_SET0_CLIENT_0 128
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MC_STAT_EMC_FILTER_SET1_CLIENT_0 168
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MC_STAT_EMC_FILTER_SET0_CLIENT_1 12c
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MC_STAT_EMC_FILTER_SET1_CLIENT_1 16c
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MC_STAT_EMC_FILTER_SET0_CLIENT_2 130
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MC_STAT_EMC_FILTER_SET1_CLIENT_2 170
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MC_STAT_EMC_FILTER_SET0_CLIENT_3 134
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MC_STAT_EMC_FILTER_SET0_CLIENT_4 b88
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MC_STAT_EMC_FILTER_SET1_CLIENT_3 174
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MC_STAT_EMC_FILTER_SET1_CLIENT_4 b8c
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MC_STAT_EMC_SET0_COUNT 138
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MC_STAT_EMC_SET0_COUNT_MSBS 13c
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MC_STAT_EMC_SET1_COUNT 178
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MC_STAT_EMC_SET1_COUNT_MSBS 17c
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MC_STAT_EMC_SET0_SLACK_ACCUM 140
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MC_STAT_EMC_SET0_SLACK_ACCUM_MSBS 144
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MC_STAT_EMC_SET1_SLACK_ACCUM 180
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MC_STAT_EMC_SET1_SLACK_ACCUM_MSBS 184
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MC_STAT_EMC_SET0_HISTO_COUNT 148
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MC_STAT_EMC_SET0_HISTO_COUNT_MSBS 14c
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MC_STAT_EMC_SET1_HISTO_COUNT 188
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MC_STAT_EMC_SET1_HISTO_COUNT_MSBS 18c
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MC_STAT_EMC_SET0_MINIMUM_SLACK_OBSERVED 150
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MC_STAT_EMC_SET1_MINIMUM_SLACK_OBSERVED 190
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MC_STAT_EMC_SET0_IDLE_CYCLE_COUNT 1b8
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MC_STAT_EMC_SET0_IDLE_CYCL_COUNT_MSBS 1bc
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MC_STAT_EMC_SET1_IDLE_CYCLE_COUNT 1c8
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MC_STAT_EMC_SET1_IDLE_CYCL_COUNT_MSBS 1cc
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MC_STAT_EMC_SET0_IDLE_CYCLE_PARTITION_SELECT 1c0
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MC_STAT_EMC_SET1_IDLE_CYCLE_PARTITION_SELECT 1d0
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MC_CLIENT_HOTRESET_CTRL 200
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MC_CLIENT_HOTRESET_CTRL_1 970
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MC_CLIENT_HOTRESET_STATUS 204
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MC_CLIENT_HOTRESET_STATUS_1 974
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MC_EMEM_ARB_ISOCHRONOUS_0 208
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MC_EMEM_ARB_ISOCHRONOUS_1 20c
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MC_EMEM_ARB_ISOCHRONOUS_2 210
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MC_EMEM_ARB_ISOCHRONOUS_3 214
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MC_EMEM_ARB_ISOCHRONOUS_4 b94
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MC_EMEM_ARB_HYSTERESIS_0 218
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MC_EMEM_ARB_HYSTERESIS_1 21c
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MC_EMEM_ARB_HYSTERESIS_2 220
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MC_EMEM_ARB_HYSTERESIS_3 224
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MC_EMEM_ARB_HYSTERESIS_4 b84
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MC_EMEM_ARB_DHYSTERESIS_0 bb0
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MC_EMEM_ARB_DHYSTERESIS_1 bb4
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MC_EMEM_ARB_DHYSTERESIS_2 bb8
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MC_EMEM_ARB_DHYSTERESIS_3 bbc
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MC_EMEM_ARB_DHYSTERESIS_4 bc0
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MC_EMEM_ARB_DHYST_CTRL bcc
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 bd0
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 bd4
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 bd8
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 bdc
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 be0
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 be4
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 be8
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MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 bec
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MC_RESERVED_RSV 3fc
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MC_DISB_EXTRA_SNAP_LEVELS 408
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MC_APB_EXTRA_SNAP_LEVELS 2a4
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MC_AHB_EXTRA_SNAP_LEVELS 2a0
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MC_USBD_EXTRA_SNAP_LEVELS a18
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MC_ISP_EXTRA_SNAP_LEVELS a08
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MC_AUD_EXTRA_SNAP_LEVELS a10
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MC_MSE_EXTRA_SNAP_LEVELS 40c
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MC_GK2_EXTRA_SNAP_LEVELS a40
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MC_A9AVPPC_EXTRA_SNAP_LEVELS 414
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MC_FTOP_EXTRA_SNAP_LEVELS 2bc
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MC_JPG_EXTRA_SNAP_LEVELS a3c
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MC_HOST_EXTRA_SNAP_LEVELS a14
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MC_SAX_EXTRA_SNAP_LEVELS 2c0
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MC_DIS_EXTRA_SNAP_LEVELS 2ac
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MC_VICPC_EXTRA_SNAP_LEVELS a1c
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MC_HDAPC_EXTRA_SNAP_LEVELS a48
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MC_AVP_EXTRA_SNAP_LEVELS 2a8
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MC_USBX_EXTRA_SNAP_LEVELS 404
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MC_PCX_EXTRA_SNAP_LEVELS 2b8
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MC_SD_EXTRA_SNAP_LEVELS a04
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MC_DFD_EXTRA_SNAP_LEVELS a4c
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MC_VE_EXTRA_SNAP_LEVELS 2d8
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MC_GK_EXTRA_SNAP_LEVELS a00
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MC_VE2_EXTRA_SNAP_LEVELS 410
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MC_SDM_EXTRA_SNAP_LEVELS a44
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MC_VIDEO_PROTECT_BOM 648
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MC_VIDEO_PROTECT_SIZE_MB 64c
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MC_VIDEO_PROTECT_BOM_ADR_HI 978
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MC_VIDEO_PROTECT_REG_CTRL 650
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MC_ERR_VPR_STATUS 654
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MC_ERR_VPR_ADR 658
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MC_VIDEO_PROTECT_VPR_OVERRIDE 418
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MC_VIDEO_PROTECT_VPR_OVERRIDE1 590
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MC_IRAM_BOM 65c
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MC_IRAM_TOM 660
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MC_IRAM_ADR_HI 980
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MC_IRAM_REG_CTRL 964
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MC_EMEM_CFG_ACCESS_CTRL 664
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MC_TZ_SECURITY_CTRL 668
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MC_EMEM_ARB_OUTSTANDING_REQ_RING3 66c
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MC_EMEM_ARB_OUTSTANDING_REQ_NISO 6b4
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MC_EMEM_ARB_RING0_THROTTLE_MASK 6bc
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MC_EMEM_ARB_NISO_THROTTLE_MASK 6b8
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MC_EMEM_ARB_NISO_THROTTLE_MASK_1 b80
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MC_SEC_CARVEOUT_BOM 670
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MC_SEC_CARVEOUT_SIZE_MB 674
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MC_SEC_CARVEOUT_ADR_HI 9d4
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MC_SEC_CARVEOUT_REG_CTRL 678
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MC_ERR_SEC_STATUS 67c
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MC_ERR_SEC_ADR 680
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MC_PC_IDLE_CLOCK_GATE_CONFIG 684
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MC_STUTTER_CONTROL 688
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MC_RESERVED_RSV_1 958
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MC_DVFS_PIPE_SELECT 95c
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MC_AHB_PTSA_MIN 4e0
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MC_AUD_PTSA_MIN 54c
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MC_MLL_MPCORER_PTSA_RATE 44c
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MC_RING2_PTSA_RATE 440
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MC_USBD_PTSA_RATE 530
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MC_USBX_PTSA_MIN 528
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MC_USBD_PTSA_MIN 534
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MC_APB_PTSA_MAX 4f0
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MC_JPG_PTSA_RATE 584
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MC_DIS_PTSA_MIN 420
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MC_AVP_PTSA_MAX 4fc
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MC_AVP_PTSA_RATE 4f4
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MC_RING1_PTSA_MIN 480
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MC_DIS_PTSA_MAX 424
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MC_SD_PTSA_MAX 4d8
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MC_MSE_PTSA_RATE 4c4
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MC_VICPC_PTSA_MIN 558
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MC_PCX_PTSA_MAX 4b4
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MC_ISP_PTSA_RATE 4a0
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MC_A9AVPPC_PTSA_MIN 48c
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MC_RING2_PTSA_MAX 448
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MC_AUD_PTSA_RATE 548
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MC_HOST_PTSA_MIN 51c
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MC_MLL_MPCORER_PTSA_MAX 454
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MC_SD_PTSA_MIN 4d4
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MC_RING1_PTSA_RATE 47c
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MC_JPG_PTSA_MIN 588
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MC_HDAPC_PTSA_MIN 62c
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MC_AVP_PTSA_MIN 4f8
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MC_JPG_PTSA_MAX 58c
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MC_VE_PTSA_MAX 43c
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MC_DFD_PTSA_MAX 63c
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MC_VICPC_PTSA_RATE 554
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MC_GK_PTSA_MAX 544
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MC_VICPC_PTSA_MAX 55c
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MC_SDM_PTSA_MAX 624
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MC_SAX_PTSA_RATE 4b8
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MC_PCX_PTSA_MIN 4b0
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MC_APB_PTSA_MIN 4ec
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MC_GK2_PTSA_MIN 614
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MC_PCX_PTSA_RATE 4ac
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MC_RING1_PTSA_MAX 484
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MC_HDAPC_PTSA_RATE 628
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MC_MLL_MPCORER_PTSA_MIN 450
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MC_GK2_PTSA_MAX 618
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MC_AUD_PTSA_MAX 550
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MC_GK2_PTSA_RATE 610
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MC_ISP_PTSA_MAX 4a8
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MC_DISB_PTSA_RATE 428
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MC_VE2_PTSA_MAX 49c
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MC_DFD_PTSA_MIN 638
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MC_FTOP_PTSA_RATE 50c
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MC_A9AVPPC_PTSA_RATE 488
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MC_VE2_PTSA_MIN 498
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MC_USBX_PTSA_MAX 52c
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MC_DIS_PTSA_RATE 41c
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MC_USBD_PTSA_MAX 538
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MC_A9AVPPC_PTSA_MAX 490
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MC_USBX_PTSA_RATE 524
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MC_FTOP_PTSA_MAX 514
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MC_HDAPC_PTSA_MAX 630
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MC_SD_PTSA_RATE 4d0
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MC_DFD_PTSA_RATE 634
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MC_FTOP_PTSA_MIN 510
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MC_SDM_PTSA_RATE 61c
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MC_AHB_PTSA_RATE 4dc
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MC_SMMU_SMMU_PTSA_MAX 460
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MC_RING2_PTSA_MIN 444
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MC_SDM_PTSA_MIN 620
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MC_APB_PTSA_RATE 4e8
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MC_MSE_PTSA_MIN 4c8
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MC_HOST_PTSA_RATE 518
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MC_VE_PTSA_RATE 434
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MC_AHB_PTSA_MAX 4e4
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MC_SAX_PTSA_MIN 4bc
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MC_SMMU_SMMU_PTSA_MIN 45c
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MC_ISP_PTSA_MIN 4a4
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MC_HOST_PTSA_MAX 520
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MC_SAX_PTSA_MAX 4c0
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MC_VE_PTSA_MIN 438
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MC_GK_PTSA_MIN 540
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MC_MSE_PTSA_MAX 4cc
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MC_DISB_PTSA_MAX 430
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MC_DISB_PTSA_MIN 42c
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MC_SMMU_SMMU_PTSA_RATE 458
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MC_VE2_PTSA_RATE 494
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MC_GK_PTSA_RATE 53c
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MC_PTSA_GRANT_DECREMENT 960
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MC_LATENCY_ALLOWANCE_AVPC_0 2e4
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MC_LATENCY_ALLOWANCE_AXIAP_0 3a0
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MC_LATENCY_ALLOWANCE_XUSB_1 380
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MC_LATENCY_ALLOWANCE_ISP2B_0 384
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MC_LATENCY_ALLOWANCE_SDMMCAA_0 3bc
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MC_LATENCY_ALLOWANCE_SDMMCA_0 3b8
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MC_LATENCY_ALLOWANCE_ISP2_0 370
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MC_LATENCY_ALLOWANCE_SE_0 3e0
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MC_LATENCY_ALLOWANCE_ISP2_1 374
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MC_LATENCY_ALLOWANCE_DC_0 2e8
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MC_LATENCY_ALLOWANCE_VIC_0 394
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MC_LATENCY_ALLOWANCE_DCB_1 2f8
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MC_LATENCY_ALLOWANCE_NVDEC_0 3d8
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MC_LATENCY_ALLOWANCE_DCB_2 2fc
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MC_LATENCY_ALLOWANCE_TSEC_0 390
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MC_LATENCY_ALLOWANCE_DC_2 2f0
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB 694
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MC_LATENCY_ALLOWANCE_PPCS_1 348
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MC_LATENCY_ALLOWANCE_XUSB_0 37c
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MC_LATENCY_ALLOWANCE_PPCS_0 344
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MC_LATENCY_ALLOWANCE_TSECB_0 3f0
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MC_LATENCY_ALLOWANCE_AFI_0 2e0
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B 698
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MC_LATENCY_ALLOWANCE_DC_1 2ec
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MC_LATENCY_ALLOWANCE_APE_0 3dc
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C 6a0
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MC_LATENCY_ALLOWANCE_A9AVP_0 3a4
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MC_LATENCY_ALLOWANCE_GPU2_0 3e8
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MC_LATENCY_ALLOWANCE_DCB_0 2f4
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MC_LATENCY_ALLOWANCE_HC_1 314
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MC_LATENCY_ALLOWANCE_SDMMC_0 3c0
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MC_LATENCY_ALLOWANCE_NVJPG_0 3e4
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MC_LATENCY_ALLOWANCE_PTC_0 34c
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MC_LATENCY_ALLOWANCE_ETR_0 3ec
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MC_LATENCY_ALLOWANCE_MPCORE_0 320
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MC_LATENCY_ALLOWANCE_VI2_0 398
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB 69c
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB 6a4
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MC_LATENCY_ALLOWANCE_SATA_0 350
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MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A 690
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MC_LATENCY_ALLOWANCE_HC_0 310
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MC_LATENCY_ALLOWANCE_DC_3 3c8
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MC_LATENCY_ALLOWANCE_GPU_0 3ac
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MC_LATENCY_ALLOWANCE_SDMMCAB_0 3c4
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MC_LATENCY_ALLOWANCE_ISP2B_1 388
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MC_LATENCY_ALLOWANCE_NVENC_0 328
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MC_LATENCY_ALLOWANCE_HDA_0 318
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MC_MIN_LENGTH_APE_0 b34
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MC_MIN_LENGTH_DCB_2 8a8
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MC_MIN_LENGTH_A9AVP_0 950
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MC_MIN_LENGTH_TSEC_0 93c
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MC_MIN_LENGTH_DC_1 898
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MC_MIN_LENGTH_AXIAP_0 94c
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MC_MIN_LENGTH_ISP2B_0 930
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MC_MIN_LENGTH_VI2_0 944
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MC_MIN_LENGTH_DCB_0 8a0
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MC_MIN_LENGTH_DCB_1 8a4
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MC_MIN_LENGTH_PPCS_1 8f4
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MC_MIN_LENGTH_NVJPG_0 b3c
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MC_MIN_LENGTH_HDA_0 8c4
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MC_MIN_LENGTH_NVENC_0 8d4
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MC_MIN_LENGTH_SDMMC_0 b18
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MC_MIN_LENGTH_ISP2B_1 934
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MC_MIN_LENGTH_HC_1 8c0
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MC_MIN_LENGTH_DC_3 b20
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MC_MIN_LENGTH_AVPC_0 890
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MC_MIN_LENGTH_VIC_0 940
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MC_MIN_LENGTH_ISP2_0 91c
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MC_MIN_LENGTH_HC_0 8bc
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MC_MIN_LENGTH_SE_0 b38
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MC_MIN_LENGTH_NVDEC_0 b30
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MC_MIN_LENGTH_SATA_0 8fc
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MC_MIN_LENGTH_DC_0 894
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MC_MIN_LENGTH_XUSB_1 92c
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MC_MIN_LENGTH_DC_2 89c
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MC_MIN_LENGTH_SDMMCAA_0 b14
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MC_MIN_LENGTH_GPU_0 b04
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MC_MIN_LENGTH_ETR_0 b44
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MC_MIN_LENGTH_AFI_0 88c
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MC_MIN_LENGTH_PPCS_0 8f0
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MC_MIN_LENGTH_ISP2_1 920
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MC_MIN_LENGTH_XUSB_0 928
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MC_MIN_LENGTH_MPCORE_0 8cc
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MC_MIN_LENGTH_TSECB_0 b48
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MC_MIN_LENGTH_SDMMCA_0 b10
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MC_MIN_LENGTH_GPU2_0 b40
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MC_MIN_LENGTH_SDMMCAB_0 b1c
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MC_MIN_LENGTH_PTC_0 8f8
|
|
MC_EMEM_ARB_OVERRIDE_1 968
|
|
MC_VIDEO_PROTECT_GPU_OVERRIDE_0 984
|
|
MC_VIDEO_PROTECT_GPU_OVERRIDE_1 988
|
|
MC_EMEM_ARB_STATS_0 990
|
|
MC_EMEM_ARB_STATS_1 994
|
|
MC_MTS_CARVEOUT_BOM 9a0
|
|
MC_MTS_CARVEOUT_SIZE_MB 9a4
|
|
MC_MTS_CARVEOUT_ADR_HI 9a8
|
|
MC_MTS_CARVEOUT_REG_CTRL 9ac
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|
MC_ERR_MTS_STATUS 9b0
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MC_ERR_MTS_ADR 9b4
|
|
MC_ERR_GENERALIZED_CARVEOUT_STATUS c00
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MC_ERR_GENERALIZED_CARVEOUT_ADR c04
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MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 d74
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MC_SECURITY_CARVEOUT4_CFG0 cf8
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MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 d10
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|
MC_SECURITY_CARVEOUT4_SIZE_128KB d04
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|
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 c28
|
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MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 c30
|
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MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 c8c
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MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 d1c
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MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 d70
|
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MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 c2c
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MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 d7c
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|
MC_SECURITY_CARVEOUT3_SIZE_128KB cb4
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|
MC_SECURITY_CARVEOUT2_CFG0 c58
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|
MC_SECURITY_CARVEOUT1_CFG0 c08
|
|
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 c84
|
|
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 c68
|
|
MC_SECURITY_CARVEOUT3_BOM cac
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|
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 c70
|
|
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 d78
|
|
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 c7c
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MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 d18
|
|
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 cbc
|
|
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 c38
|
|
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 c34
|
|
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 cc0
|
|
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 d60
|
|
MC_SECURITY_CARVEOUT3_CFG0 ca8
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|
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 cb8
|
|
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 c88
|
|
MC_SECURITY_CARVEOUT2_SIZE_128KB c64
|
|
MC_SECURITY_CARVEOUT5_BOM_HI d50
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|
MC_SECURITY_CARVEOUT1_SIZE_128KB c14
|
|
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 d14
|
|
MC_SECURITY_CARVEOUT1_BOM c0c
|
|
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 d2c
|
|
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 d68
|
|
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 cc8
|
|
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 d58
|
|
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 d24
|
|
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 cc4
|
|
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 c78
|
|
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 c1c
|
|
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 c18
|
|
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 d28
|
|
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 d5c
|
|
MC_SECURITY_CARVEOUT3_BOM_HI cb0
|
|
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 cd8
|
|
MC_SECURITY_CARVEOUT2_BOM_HI c60
|
|
MC_SECURITY_CARVEOUT4_BOM_HI d00
|
|
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 d64
|
|
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 cdc
|
|
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 c80
|
|
MC_SECURITY_CARVEOUT5_SIZE_128KB d54
|
|
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 d20
|
|
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 cd4
|
|
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 d0c
|
|
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 c74
|
|
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 ccc
|
|
MC_SECURITY_CARVEOUT4_BOM cfc
|
|
MC_SECURITY_CARVEOUT5_CFG0 d48
|
|
MC_SECURITY_CARVEOUT2_BOM c5c
|
|
MC_SECURITY_CARVEOUT5_BOM d4c
|
|
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 c24
|
|
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 d6c
|
|
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 cd0
|
|
MC_SECURITY_CARVEOUT1_BOM_HI c10
|
|
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 c20
|
|
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 c3c
|
|
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 c6c
|
|
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 d08
|
|
MC_ERR_APB_ASID_UPDATE_STATUS 9d0
|
|
MC_DA_CONFIG0 9dc
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