1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-30 05:22:05 +00:00
hekate/bootloader/soc
CTCaer 4d53f21387 mtc: Clear init magic on chainload
Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition.

L4T does not overwrite the nyx storage where the Minerva configuration is stored.
This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP.
2020-01-14 23:41:15 +02:00
..
bpmp.c clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
bpmp.h bpmp: Update driver to latest 2019-12-14 22:21:42 +02:00
clock.c clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
clock.h clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
cluster.c Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
cluster.h utils: Fix ms timer accuracy 2019-08-28 01:33:38 +03:00
fuse.c refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
fuse.h Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
gpio.c
gpio.h
hw_init.c mtc: Clear init magic on chainload 2020-01-14 23:41:15 +02:00
hw_init.h
i2c.c Various bugfixes 2019-08-28 01:08:57 +03:00
i2c.h
kfuse.c kfuse: Ensure that kfuse is ready 100% for tsec 2019-10-22 18:57:51 +03:00
kfuse.h kfuse: Ensure that kfuse is ready 100% for tsec 2019-10-22 18:57:51 +03:00
pinmux.c Fix debug uart 2018-12-08 12:38:59 +08:00
pinmux.h refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
pmc.h Add more register names + refactoring 2019-09-09 16:56:37 +03:00
pmc_lp0_t210.h
smmu.c Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
smmu.h 6.2.0 support 2018-11-30 23:20:15 +02:00
t210.h Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
uart.c uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00
uart.h uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00