CTCaer 1d69809022 sdram: Allow killing ram clock source if desired		2020-04-30 03:39:18 +03:00
..
emc.h	sdram: Allow killing ram clock source if desired	2020-04-30 03:39:18 +03:00
heap.c	Update and add missing copyrights	2020-03-14 09:24:24 +02:00
heap.h	Update and add missing copyrights	2020-03-14 09:24:24 +02:00
mc.c	Refactoring and comment adding	2019-09-12 23:08:38 +03:00
mc.h
mc_t210.h	Various fixes and whitespace removal	2020-04-30 03:25:22 +03:00
minerva.c	minerva: More protections	2020-03-21 22:10:06 +02:00
minerva.h	minerva: Fix compatibility check for hekate main	2019-12-09 22:27:01 +02:00
mtc_table.h	refactor: Remove all unwanted whitespace	2019-10-18 18:02:06 +03:00
sdram.c	sdram: Allow killing ram clock source if desired	2020-04-30 03:39:18 +03:00
sdram.h	sdram: Add MR read request	2020-04-30 03:27:39 +03:00
sdram_config.inl	sdram: Document cfg and use vendor patches	2020-04-30 03:37:40 +03:00
sdram_config_lz.inl	Proper warmboot exploit impl and documentation	2018-12-17 21:10:13 +02:00
sdram_lp0.c	Normalize brom patches & add sd autocalib fallback	2019-02-12 00:40:40 +02:00
sdram_lp0_param_t210.h	refactor: Remove all unwanted whitespace	2019-10-18 18:02:06 +03:00
sdram_param_t210.h	sdram: Allow killing ram clock source if desired	2020-04-30 03:39:18 +03:00