mirror of
https://github.com/CTCaer/hekate.git
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94 lines
3.3 KiB
C
94 lines
3.3 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 st4rk
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* Copyright (c) 2018-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _PMC_H_
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#define _PMC_H_
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#include <utils/types.h>
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/*! PMC registers. */
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#define APBDEV_PMC_CNTRL 0x0
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#define PMC_CNTRL_MAIN_RST (1 << 4)
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#define APBDEV_PMC_SEC_DISABLE 0x4
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#define APBDEV_PMC_PWRGATE_TOGGLE 0x30
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#define APBDEV_PMC_PWRGATE_STATUS 0x38
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#define APBDEV_PMC_NO_IOPOWER 0x44
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#define PMC_NO_IOPOWER_GPIO_IO_EN (1 << 21)
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#define PMC_NO_IOPOWER_AUDIO_HV (1 << 18)
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#define PMC_NO_IOPOWER_SDMMC1_IO_EN (1 << 12)
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#define APBDEV_PMC_SCRATCH0 0x50
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#define PMC_SCRATCH0_MODE_RECOVERY (1 << 31)
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#define PMC_SCRATCH0_MODE_FASTBOOT (1 << 30)
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#define PMC_SCRATCH0_MODE_PAYLOAD (1 << 29)
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#define PMC_SCRATCH0_MODE_RCM (1 << 1)
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#define PMC_SCRATCH0_MODE_WARMBOOT (1 << 0)
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#define APBDEV_PMC_SCRATCH1 0x54
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#define APBDEV_PMC_SCRATCH20 0xA0
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#define APBDEV_PMC_PWR_DET_VAL 0xE4
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#define PMC_PWR_DET_GPIO_IO_EN (1 << 21)
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#define PMC_PWR_DET_AUDIO_HV (1 << 18)
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#define PMC_PWR_DET_SDMMC1_IO_EN (1 << 12)
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#define APBDEV_PMC_DDR_PWR 0xE8
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#define APBDEV_PMC_USB_AO 0xF0
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#define APBDEV_PMC_CRYPTO_OP 0xF4
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#define PMC_CRYPTO_OP_SE_ENABLE 0
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#define PMC_CRYPTO_OP_SE_DISABLE 1
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#define APBDEV_PMC_SCRATCH33 0x120
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#define APBDEV_PMC_SCRATCH37 0x130
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#define PMC_SCRATCH37_KERNEL_PANIC_FLAG (1 << 24)
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#define APBDEV_PMC_SCRATCH40 0x13C
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#define APBDEV_PMC_OSC_EDPD_OVER 0x1A4
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#define PMC_OSC_EDPD_OVER_OSC_CTRL_OVER 0x400000
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#define APBDEV_PMC_CLK_OUT_CNTRL 0x1A8
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#define PMC_CLK_OUT_CNTRL_CLK1_FORCE_EN (1 << 2)
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#define APBDEV_PMC_RST_STATUS 0x1B4
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#define APBDEV_PMC_IO_DPD_REQ 0x1B8
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#define APBDEV_PMC_IO_DPD2_REQ 0x1C0
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#define APBDEV_PMC_VDDP_SEL 0x1CC
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#define APBDEV_PMC_DDR_CFG 0x1D0
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#define APBDEV_PMC_SCRATCH45 0x234
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#define APBDEV_PMC_SCRATCH46 0x238
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#define APBDEV_PMC_SCRATCH49 0x244
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#define APBDEV_PMC_TSC_MULT 0x2B4
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#define APBDEV_PMC_SEC_DISABLE2 0x2C4
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#define APBDEV_PMC_WEAK_BIAS 0x2C8
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#define APBDEV_PMC_REG_SHORT 0x2CC
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#define APBDEV_PMC_SEC_DISABLE3 0x2D8
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#define APBDEV_PMC_SECURE_SCRATCH21 0x334
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#define PMC_FUSE_PRIVATEKEYDISABLE_TZ_STICKY_BIT 0x10
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#define APBDEV_PMC_SECURE_SCRATCH32 0x360
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#define APBDEV_PMC_SECURE_SCRATCH49 0x3A4
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#define APBDEV_PMC_CNTRL2 0x440
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#define PMC_CNTRL2_HOLD_CKE_LOW_EN 0x1000
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#define APBDEV_PMC_IO_DPD3_REQ 0x45C
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#define APBDEV_PMC_IO_DPD4_REQ 0x464
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#define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4
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#define APBDEV_PMC_UTMIP_PAD_CFG3 0x4CC
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#define APBDEV_PMC_DDR_CNTRL 0x4E4
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#define APBDEV_PMC_SEC_DISABLE4 0x5B0
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#define APBDEV_PMC_SEC_DISABLE5 0x5B4
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#define APBDEV_PMC_SEC_DISABLE6 0x5B8
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#define APBDEV_PMC_SEC_DISABLE7 0x5BC
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#define APBDEV_PMC_SEC_DISABLE8 0x5C0
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#define APBDEV_PMC_SCRATCH188 0x810
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#define APBDEV_PMC_SCRATCH190 0x818
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#define APBDEV_PMC_SCRATCH200 0x840
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int pmc_enable_partition(u32 part, int enable);
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#endif
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