2014-04-09 00:19:26 +01:00
|
|
|
// Copyright 2014 Citra Emulator Project
|
2014-12-17 05:38:14 +00:00
|
|
|
// Licensed under GPLv2 or any later version
|
2014-11-19 08:49:13 +00:00
|
|
|
// Refer to the license.txt file included.
|
2014-04-05 03:26:06 +01:00
|
|
|
|
|
|
|
#pragma once
|
|
|
|
|
2018-01-09 21:33:46 +00:00
|
|
|
#include <array>
|
2019-05-18 02:43:26 +01:00
|
|
|
#include <vector>
|
2014-04-09 01:15:08 +01:00
|
|
|
#include "common/common_types.h"
|
2018-09-21 00:28:48 +01:00
|
|
|
|
core/cpu_core_manager: Create threads separately from initialization.
Our initialization process is a little wonky than one would expect when
it comes to code flow. We initialize the CPU last, as opposed to
hardware, where the CPU obviously needs to be first, otherwise nothing
else would work, and we have code that adds checks to get around this.
For example, in the page table setting code, we check to see if the
system is turned on before we even notify the CPU instances of a page
table switch. This results in dead code (at the moment), because the
only time a page table switch will occur is when the system is *not*
running, preventing the emulated CPU instances from being notified of a
page table switch in a convenient manner (technically the code path
could be taken, but we don't emulate the process creation svc handlers
yet).
This moves the threads creation into its own member function of the core
manager and restores a little order (and predictability) to our
initialization process.
Previously, in the multi-threaded cases, we'd kick off several threads
before even the main kernel process was created and ready to execute (gross!).
Now the initialization process is like so:
Initialization:
1. Timers
2. CPU
3. Kernel
4. Filesystem stuff (kind of gross, but can be amended trivially)
5. Applet stuff (ditto in terms of being kind of gross)
6. Main process (will be moved into the loading step in a following
change)
7. Telemetry (this should be initialized last in the future).
8. Services (4 and 5 should ideally be alongside this).
9. GDB (gross. Uses namespace scope state. Needs to be refactored into a
class or booted altogether).
10. Renderer
11. GPU (will also have its threads created in a separate step in a
following change).
Which... isn't *ideal* per-se, however getting rid of the wonky
intertwining of CPU state initialization out of this mix gets rid of
most of the footguns when it comes to our initialization process.
2019-04-09 18:25:54 +01:00
|
|
|
namespace Common {
|
|
|
|
struct PageTable;
|
|
|
|
}
|
|
|
|
|
2018-09-21 00:28:48 +01:00
|
|
|
namespace Kernel {
|
|
|
|
enum class VMAPermission : u8;
|
|
|
|
}
|
2014-04-05 03:26:06 +01:00
|
|
|
|
2018-08-25 02:43:32 +01:00
|
|
|
namespace Core {
|
|
|
|
|
2018-09-18 07:49:40 +01:00
|
|
|
/// Generic ARMv8 CPU interface
|
2014-04-27 23:29:51 +01:00
|
|
|
class ARM_Interface : NonCopyable {
|
2014-04-05 03:26:06 +01:00
|
|
|
public:
|
2016-09-19 02:01:46 +01:00
|
|
|
virtual ~ARM_Interface() {}
|
2014-04-05 03:26:06 +01:00
|
|
|
|
2016-12-22 05:08:09 +00:00
|
|
|
struct ThreadContext {
|
2018-01-09 21:33:46 +00:00
|
|
|
std::array<u64, 31> cpu_registers;
|
2017-08-29 02:09:42 +01:00
|
|
|
u64 sp;
|
|
|
|
u64 pc;
|
2018-09-29 22:58:26 +01:00
|
|
|
u32 pstate;
|
|
|
|
std::array<u8, 4> padding;
|
2018-09-18 07:49:40 +01:00
|
|
|
std::array<u128, 32> vector_registers;
|
2018-09-29 22:58:26 +01:00
|
|
|
u32 fpcr;
|
|
|
|
u32 fpsr;
|
|
|
|
u64 tpidr;
|
2016-12-22 05:08:09 +00:00
|
|
|
};
|
2018-09-29 22:58:26 +01:00
|
|
|
// Internally within the kernel, it expects the AArch64 version of the
|
|
|
|
// thread context to be 800 bytes in size.
|
|
|
|
static_assert(sizeof(ThreadContext) == 0x320);
|
2016-12-22 05:08:09 +00:00
|
|
|
|
2018-02-14 17:47:48 +00:00
|
|
|
/// Runs the CPU until an event happens
|
|
|
|
virtual void Run() = 0;
|
2014-05-17 16:59:18 +01:00
|
|
|
|
2014-04-05 20:23:59 +01:00
|
|
|
/// Step CPU by one instruction
|
2018-02-14 17:47:48 +00:00
|
|
|
virtual void Step() = 0;
|
2014-05-17 16:59:18 +01:00
|
|
|
|
2016-06-27 19:38:49 +01:00
|
|
|
/// Clear all instruction cache
|
|
|
|
virtual void ClearInstructionCache() = 0;
|
|
|
|
|
core/cpu_core_manager: Create threads separately from initialization.
Our initialization process is a little wonky than one would expect when
it comes to code flow. We initialize the CPU last, as opposed to
hardware, where the CPU obviously needs to be first, otherwise nothing
else would work, and we have code that adds checks to get around this.
For example, in the page table setting code, we check to see if the
system is turned on before we even notify the CPU instances of a page
table switch. This results in dead code (at the moment), because the
only time a page table switch will occur is when the system is *not*
running, preventing the emulated CPU instances from being notified of a
page table switch in a convenient manner (technically the code path
could be taken, but we don't emulate the process creation svc handlers
yet).
This moves the threads creation into its own member function of the core
manager and restores a little order (and predictability) to our
initialization process.
Previously, in the multi-threaded cases, we'd kick off several threads
before even the main kernel process was created and ready to execute (gross!).
Now the initialization process is like so:
Initialization:
1. Timers
2. CPU
3. Kernel
4. Filesystem stuff (kind of gross, but can be amended trivially)
5. Applet stuff (ditto in terms of being kind of gross)
6. Main process (will be moved into the loading step in a following
change)
7. Telemetry (this should be initialized last in the future).
8. Services (4 and 5 should ideally be alongside this).
9. GDB (gross. Uses namespace scope state. Needs to be refactored into a
class or booted altogether).
10. Renderer
11. GPU (will also have its threads created in a separate step in a
following change).
Which... isn't *ideal* per-se, however getting rid of the wonky
intertwining of CPU state initialization out of this mix gets rid of
most of the footguns when it comes to our initialization process.
2019-04-09 18:25:54 +01:00
|
|
|
/// Notifies CPU emulation that the current page table has changed.
|
|
|
|
///
|
|
|
|
/// @param new_page_table The new page table.
|
|
|
|
/// @param new_address_space_size_in_bits The new usable size of the address space in bits.
|
|
|
|
/// This can be either 32, 36, or 39 on official software.
|
|
|
|
///
|
|
|
|
virtual void PageTableChanged(Common::PageTable& new_page_table,
|
|
|
|
std::size_t new_address_space_size_in_bits) = 0;
|
2017-09-24 22:44:13 +01:00
|
|
|
|
2014-04-05 20:23:59 +01:00
|
|
|
/**
|
|
|
|
* Set the Program Counter to an address
|
|
|
|
* @param addr Address to set PC to
|
|
|
|
*/
|
2017-08-29 02:09:42 +01:00
|
|
|
virtual void SetPC(u64 addr) = 0;
|
2014-04-05 20:23:59 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the current Program Counter
|
|
|
|
* @return Returns current PC
|
|
|
|
*/
|
2017-08-29 02:09:42 +01:00
|
|
|
virtual u64 GetPC() const = 0;
|
2014-04-05 20:23:59 +01:00
|
|
|
|
|
|
|
/**
|
|
|
|
* Get an ARM register
|
2017-08-29 02:09:42 +01:00
|
|
|
* @param index Register index
|
2014-04-05 20:23:59 +01:00
|
|
|
* @return Returns the value in the register
|
|
|
|
*/
|
2017-08-29 02:09:42 +01:00
|
|
|
virtual u64 GetReg(int index) const = 0;
|
2014-04-05 20:23:59 +01:00
|
|
|
|
2014-04-11 00:57:56 +01:00
|
|
|
/**
|
|
|
|
* Set an ARM register
|
2017-08-29 02:09:42 +01:00
|
|
|
* @param index Register index
|
2014-04-11 00:57:56 +01:00
|
|
|
* @param value Value to set register to
|
|
|
|
*/
|
2017-08-29 02:09:42 +01:00
|
|
|
virtual void SetReg(int index, u64 value) = 0;
|
2014-04-11 00:57:56 +01:00
|
|
|
|
2015-08-07 02:24:25 +01:00
|
|
|
/**
|
2018-09-18 07:49:40 +01:00
|
|
|
* Gets the value of a specified vector register.
|
|
|
|
*
|
|
|
|
* @param index The index of the vector register.
|
|
|
|
* @return the value within the vector register.
|
2015-08-07 02:24:25 +01:00
|
|
|
*/
|
2018-09-18 07:49:40 +01:00
|
|
|
virtual u128 GetVectorReg(int index) const = 0;
|
2015-08-07 02:24:25 +01:00
|
|
|
|
|
|
|
/**
|
2018-09-18 07:49:40 +01:00
|
|
|
* Sets a given value into a vector register.
|
|
|
|
*
|
|
|
|
* @param index The index of the vector register.
|
|
|
|
* @param value The new value to place in the register.
|
2015-08-07 02:24:25 +01:00
|
|
|
*/
|
2018-09-18 07:49:40 +01:00
|
|
|
virtual void SetVectorReg(int index, u128 value) = 0;
|
2015-08-07 02:24:25 +01:00
|
|
|
|
2014-04-05 20:23:59 +01:00
|
|
|
/**
|
2018-09-18 07:49:40 +01:00
|
|
|
* Get the current PSTATE register
|
|
|
|
* @return Returns the value of the PSTATE register
|
2014-04-05 20:23:59 +01:00
|
|
|
*/
|
2018-09-18 07:49:40 +01:00
|
|
|
virtual u32 GetPSTATE() const = 0;
|
2014-04-05 06:23:28 +01:00
|
|
|
|
2014-05-12 03:14:13 +01:00
|
|
|
/**
|
2018-09-18 07:49:40 +01:00
|
|
|
* Set the current PSTATE register
|
|
|
|
* @param pstate Value to set PSTATE to
|
2014-05-12 03:14:13 +01:00
|
|
|
*/
|
2018-09-18 07:49:40 +01:00
|
|
|
virtual void SetPSTATE(u32 pstate) = 0;
|
2014-05-12 03:14:13 +01:00
|
|
|
|
2017-09-30 19:16:39 +01:00
|
|
|
virtual VAddr GetTlsAddress() const = 0;
|
|
|
|
|
|
|
|
virtual void SetTlsAddress(VAddr address) = 0;
|
|
|
|
|
2018-09-18 07:49:40 +01:00
|
|
|
/**
|
|
|
|
* Gets the value within the TPIDR_EL0 (read/write software thread ID) register.
|
|
|
|
*
|
|
|
|
* @return the value within the register.
|
|
|
|
*/
|
2018-07-21 01:57:45 +01:00
|
|
|
virtual u64 GetTPIDR_EL0() const = 0;
|
|
|
|
|
2018-09-18 07:49:40 +01:00
|
|
|
/**
|
|
|
|
* Sets a new value within the TPIDR_EL0 (read/write software thread ID) register.
|
|
|
|
*
|
|
|
|
* @param value The new value to place in the register.
|
|
|
|
*/
|
2018-07-21 01:57:45 +01:00
|
|
|
virtual void SetTPIDR_EL0(u64 value) = 0;
|
|
|
|
|
2014-05-20 23:50:16 +01:00
|
|
|
/**
|
|
|
|
* Saves the current CPU context
|
|
|
|
* @param ctx Thread context to save
|
|
|
|
*/
|
2016-12-22 05:08:09 +00:00
|
|
|
virtual void SaveContext(ThreadContext& ctx) = 0;
|
2014-05-20 23:50:16 +01:00
|
|
|
|
|
|
|
/**
|
|
|
|
* Loads a CPU context
|
|
|
|
* @param ctx Thread context to load
|
|
|
|
*/
|
2016-12-22 05:08:09 +00:00
|
|
|
virtual void LoadContext(const ThreadContext& ctx) = 0;
|
2014-05-20 23:50:16 +01:00
|
|
|
|
2018-09-18 07:49:40 +01:00
|
|
|
/// Clears the exclusive monitor's state.
|
2018-07-16 11:24:00 +01:00
|
|
|
virtual void ClearExclusiveState() = 0;
|
|
|
|
|
2014-06-02 02:40:10 +01:00
|
|
|
/// Prepare core for thread reschedule (if needed to correctly handle state)
|
|
|
|
virtual void PrepareReschedule() = 0;
|
2018-12-03 09:13:48 +00:00
|
|
|
|
2019-05-18 02:43:26 +01:00
|
|
|
struct BacktraceEntry {
|
|
|
|
std::string module;
|
|
|
|
u64 address;
|
|
|
|
u64 original_address;
|
|
|
|
u64 offset;
|
|
|
|
std::string name;
|
|
|
|
};
|
|
|
|
|
|
|
|
std::vector<BacktraceEntry> GetBacktrace() const;
|
|
|
|
|
2018-12-29 01:55:19 +00:00
|
|
|
/// fp (= r29) points to the last frame record.
|
|
|
|
/// Note that this is the frame record for the *previous* frame, not the current one.
|
|
|
|
/// Note we need to subtract 4 from our last read to get the proper address
|
|
|
|
/// Frame records are two words long:
|
|
|
|
/// fp+0 : pointer to previous frame record
|
|
|
|
/// fp+8 : value of lr for frame
|
2018-12-31 01:44:46 +00:00
|
|
|
void LogBacktrace() const;
|
2014-04-05 03:26:06 +01:00
|
|
|
};
|
2018-08-25 02:43:32 +01:00
|
|
|
|
|
|
|
} // namespace Core
|