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gl_shader_manager: Move using statement into the cpp file
Avoids introducing Maxwell3D into the namespace for everything that includes the header.
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2 changed files with 4 additions and 4 deletions
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@ -6,6 +6,8 @@
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namespace OpenGL::GLShader {
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namespace OpenGL::GLShader {
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using Tegra::Engines::Maxwell3D;
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void MaxwellUniformData::SetFromRegs(const Maxwell3D& maxwell, std::size_t shader_stage) {
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void MaxwellUniformData::SetFromRegs(const Maxwell3D& maxwell, std::size_t shader_stage) {
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const auto& regs = maxwell.regs;
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const auto& regs = maxwell.regs;
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const auto& state = maxwell.state;
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const auto& state = maxwell.state;
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@ -16,7 +18,7 @@ void MaxwellUniformData::SetFromRegs(const Maxwell3D& maxwell, std::size_t shade
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u32 func = static_cast<u32>(regs.alpha_test_func);
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u32 func = static_cast<u32>(regs.alpha_test_func);
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// Normalize the gl variants of opCompare to be the same as the normal variants
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// Normalize the gl variants of opCompare to be the same as the normal variants
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u32 op_gl_variant_base = static_cast<u32>(Tegra::Engines::Maxwell3D::Regs::ComparisonOp::Never);
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const u32 op_gl_variant_base = static_cast<u32>(Maxwell3D::Regs::ComparisonOp::Never);
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if (func >= op_gl_variant_base) {
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if (func >= op_gl_variant_base) {
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func = func - op_gl_variant_base + 1U;
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func = func - op_gl_variant_base + 1U;
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}
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}
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@ -12,14 +12,12 @@
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namespace OpenGL::GLShader {
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namespace OpenGL::GLShader {
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using Tegra::Engines::Maxwell3D;
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/// Uniform structure for the Uniform Buffer Object, all vectors must be 16-byte aligned
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/// Uniform structure for the Uniform Buffer Object, all vectors must be 16-byte aligned
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/// @note Always keep a vec4 at the end. The GL spec is not clear whether the alignment at
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/// @note Always keep a vec4 at the end. The GL spec is not clear whether the alignment at
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/// the end of a uniform block is included in UNIFORM_BLOCK_DATA_SIZE or not.
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/// the end of a uniform block is included in UNIFORM_BLOCK_DATA_SIZE or not.
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/// Not following that rule will cause problems on some AMD drivers.
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/// Not following that rule will cause problems on some AMD drivers.
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struct MaxwellUniformData {
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struct MaxwellUniformData {
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void SetFromRegs(const Maxwell3D& maxwell, std::size_t shader_stage);
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void SetFromRegs(const Tegra::Engines::Maxwell3D& maxwell, std::size_t shader_stage);
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alignas(16) GLvec4 viewport_flip;
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alignas(16) GLvec4 viewport_flip;
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struct alignas(16) {
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struct alignas(16) {
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