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https://github.com/yuzu-emu/yuzu.git
synced 2024-07-04 23:31:19 +01:00
Fix ftoi behaviour
This commit is contained in:
parent
6fe0cb671d
commit
501d0bc5ed
2 changed files with 53 additions and 22 deletions
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@ -560,7 +560,7 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
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if (vdm.exponent >= 1023 + 32) {
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if (vdm.exponent >= 1023 + 32) {
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d = vdm.sign ? 0 : 0xffffffff;
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d = vdm.sign ? 0 : 0xffffffff;
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exceptions = FPSCR_IOC;
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exceptions = FPSCR_IOC;
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} else if (vdm.exponent >= 1023 - 1) {
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} else if (vdm.exponent >= 1023) {
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int shift = 1023 + 63 - vdm.exponent;
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int shift = 1023 + 63 - vdm.exponent;
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u64 rem, incr = 0;
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u64 rem, incr = 0;
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@ -595,12 +595,20 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
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} else {
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} else {
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d = 0;
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d = 0;
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if (vdm.exponent | vdm.significand) {
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if (vdm.exponent | vdm.significand) {
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exceptions |= FPSCR_IXC;
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
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if (vdm.exponent >= 1022) {
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d = vdm.sign ? 0 : 1;
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exceptions |= vdm.sign ? FPSCR_IOC : FPSCR_IXC;
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} else {
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exceptions |= FPSCR_IXC;
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}
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} else if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0) {
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d = 1;
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d = 1;
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else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign) {
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exceptions |= FPSCR_IXC;
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d = 0;
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} else if (rmode == FPSCR_ROUND_MINUSINF) {
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exceptions |= FPSCR_IOC;
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exceptions |= vdm.sign ? FPSCR_IOC : FPSCR_IXC;
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} else {
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exceptions |= FPSCR_IXC;
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}
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}
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}
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}
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}
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}
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@ -639,12 +647,12 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
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if (tm & VFP_NAN) {
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if (tm & VFP_NAN) {
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d = 0;
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d = 0;
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exceptions |= FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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} else if (vdm.exponent >= 1023 + 32) {
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} else if (vdm.exponent >= 1023 + 31) {
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d = 0x7fffffff;
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d = 0x7fffffff;
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if (vdm.sign)
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if (vdm.sign)
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d = ~d;
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d = ~d;
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exceptions |= FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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} else if (vdm.exponent >= 1023 - 1) {
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} else if (vdm.exponent >= 1023) {
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int shift = 1023 + 63 - vdm.exponent; /* 58 */
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int shift = 1023 + 63 - vdm.exponent; /* 58 */
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u64 rem, incr = 0;
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u64 rem, incr = 0;
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@ -675,10 +683,17 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
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d = 0;
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d = 0;
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if (vdm.exponent | vdm.significand) {
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if (vdm.exponent | vdm.significand) {
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exceptions |= FPSCR_IXC;
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exceptions |= FPSCR_IXC;
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if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (vdm.exponent >= 1022) {
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d = vdm.sign ? 0xffffffff : 1;
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} else {
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d = 0;
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}
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} else if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0) {
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d = 1;
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d = 1;
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else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign)
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} else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign) {
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d = -1;
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d = 0xffffffff;
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}
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}
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}
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}
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}
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@ -592,7 +592,11 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
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* 2^0 <= m < 2^32-2^8
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* 2^0 <= m < 2^32-2^8
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*/
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*/
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d = (vsm.significand << 1) >> shift;
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d = (vsm.significand << 1) >> shift;
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rem = vsm.significand << (33 - shift);
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if (shift > 0) {
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rem = (vsm.significand << 1) << (32 - shift);
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} else {
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rem = 0;
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}
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (rmode == FPSCR_ROUND_NEAREST) {
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incr = 0x80000000;
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incr = 0x80000000;
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@ -619,12 +623,20 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
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} else {
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} else {
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d = 0;
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d = 0;
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if (vsm.exponent | vsm.significand) {
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if (vsm.exponent | vsm.significand) {
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exceptions |= FPSCR_IXC;
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0)
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if (vsm.exponent >= 126) {
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d = vsm.sign ? 0 : 1;
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exceptions |= vsm.sign ? FPSCR_IOC : FPSCR_IXC;
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} else {
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exceptions |= FPSCR_IXC;
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}
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} else if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0) {
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d = 1;
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d = 1;
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else if (rmode == FPSCR_ROUND_MINUSINF && vsm.sign) {
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exceptions |= FPSCR_IXC;
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d = 0;
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} else if (rmode == FPSCR_ROUND_MINUSINF) {
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exceptions |= FPSCR_IOC;
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exceptions |= vsm.sign ? FPSCR_IOC : FPSCR_IXC;
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} else {
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exceptions |= FPSCR_IXC;
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}
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}
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}
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}
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}
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}
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@ -661,7 +673,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
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if (tm & VFP_NAN) {
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if (tm & VFP_NAN) {
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d = 0;
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d = 0;
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exceptions |= FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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} else if (vsm.exponent >= 127 + 32) {
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} else if (vsm.exponent >= 127 + 31) {
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/*
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/*
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* m >= 2^31-2^7: invalid
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* m >= 2^31-2^7: invalid
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*/
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*/
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@ -675,7 +687,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
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/* 2^0 <= m <= 2^31-2^7 */
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/* 2^0 <= m <= 2^31-2^7 */
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d = (vsm.significand << 1) >> shift;
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d = (vsm.significand << 1) >> shift;
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rem = vsm.significand << (33 - shift);
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rem = (vsm.significand << 1) << (32 - shift);
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (rmode == FPSCR_ROUND_NEAREST) {
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incr = 0x80000000;
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incr = 0x80000000;
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@ -701,10 +713,14 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
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d = 0;
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d = 0;
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if (vsm.exponent | vsm.significand) {
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if (vsm.exponent | vsm.significand) {
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exceptions |= FPSCR_IXC;
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exceptions |= FPSCR_IXC;
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if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0)
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if (rmode == FPSCR_ROUND_NEAREST) {
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if (vsm.exponent >= 126)
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d = vsm.sign ? 0xffffffff : 1;
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} else if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0) {
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d = 1;
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d = 1;
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else if (rmode == FPSCR_ROUND_MINUSINF && vsm.sign)
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} else if (rmode == FPSCR_ROUND_MINUSINF && vsm.sign) {
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d = -1;
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d = 0xffffffff;
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}
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}
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}
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}
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}
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