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Shader_IR: ICMP corrections and fixes
This commit is contained in:
parent
4b81d19a1a
commit
527b841c15
2 changed files with 11 additions and 6 deletions
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@ -1636,6 +1636,7 @@ public:
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ICMP_RC,
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ICMP_RC,
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ICMP_R,
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ICMP_R,
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ICMP_CR,
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ICMP_CR,
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ICMP_IMM,
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MUFU, // Multi-Function Operator
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MUFU, // Multi-Function Operator
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RRO_C, // Range Reduction Operator
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RRO_C, // Range Reduction Operator
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RRO_R,
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RRO_R,
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@ -1903,6 +1904,7 @@ private:
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INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"),
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INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"),
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INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"),
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INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"),
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INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"),
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INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"),
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INST("0011011-0100----", Id::ICMP_IMM, Type::ArithmeticInteger, "ICMP_IMM"),
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INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"),
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INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"),
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INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"),
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INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"),
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INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"),
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INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"),
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@ -140,11 +140,11 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
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}
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}
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case OpCode::Id::ICMP_CR:
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case OpCode::Id::ICMP_CR:
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case OpCode::Id::ICMP_R:
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case OpCode::Id::ICMP_R:
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case OpCode::Id::ICMP_RC: {
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case OpCode::Id::ICMP_RC:
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UNIMPLEMENTED_IF(instr.icmp.is_signed != 0);
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case OpCode::Id::ICMP_IMM: {
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const Node zero = Immediate(0);
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const Node zero = Immediate(0);
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const auto [op_a, op_b] = [&]() -> std::tuple<Node, Node> {
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const auto [op_b, test] = [&]() -> std::pair<Node, Node> {
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::ICMP_CR:
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case OpCode::Id::ICMP_CR:
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return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
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return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
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@ -154,13 +154,16 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
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case OpCode::Id::ICMP_RC:
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case OpCode::Id::ICMP_RC:
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return {GetRegister(instr.gpr39),
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return {GetRegister(instr.gpr39),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
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case OpCode::Id::ICMP_IMM:
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return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
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default:
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default:
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UNIMPLEMENTED();
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UNREACHABLE();
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return {zero, zero};
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return {zero, zero};
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}
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}
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}();
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}();
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const Node test = GetRegister(instr.gpr8);
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const Node op_a = GetRegister(instr.gpr8);
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const Node comparison = GetPredicateComparisonInteger(instr.icmp.cond, false, test, zero);
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const Node comparison =
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GetPredicateComparisonInteger(instr.icmp.cond, instr.icmp.is_signed != 0, test, zero);
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SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
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SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
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break;
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break;
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}
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}
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