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GPU: Stub the SSY shader instruction.

This instruction tells the GPU where the flow reconverges in a non-uniform control flow scenario, we can ignore this when generating GLSL code.
This commit is contained in:
Subv 2018-06-08 22:46:10 -05:00
parent 83517cb53a
commit abec5f82e2
2 changed files with 7 additions and 0 deletions

View file

@ -410,6 +410,7 @@ class OpCode {
public: public:
enum class Id { enum class Id {
KIL, KIL,
SSY,
BFE_C, BFE_C,
BFE_R, BFE_R,
BFE_IMM, BFE_IMM,
@ -596,6 +597,7 @@ private:
std::vector<Matcher> table = { std::vector<Matcher> table = {
#define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name) #define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name)
INST("111000110011----", Id::KIL, Type::Flow, "KIL"), INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
INST("111000101001----", Id::SSY, Type::Flow, "SSY"),
INST("111000100100----", Id::BRA, Type::Flow, "BRA"), INST("111000100100----", Id::BRA, Type::Flow, "BRA"),
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"), INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"), INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"),

View file

@ -1435,6 +1435,11 @@ private:
regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index); regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index);
break; break;
} }
case OpCode::Id::SSY: {
// The SSY opcode tells the GPU where to re-converge divergent execution paths, we
// can ignore this when generating GLSL code.
break;
}
default: { default: {
NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName()); NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName());
UNREACHABLE(); UNREACHABLE();