1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-12-24 08:56:03 +00:00
hekate/bootloader/utils/util.c

133 lines
3 KiB
C
Raw Normal View History

2018-03-27 00:04:16 +01:00
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 CTCaer
2018-03-27 00:04:16 +01:00
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
2018-03-07 01:11:46 +00:00
#include "util.h"
#include "../gfx/di.h"
#include "../power/max77620.h"
#include "../rtc/max77620-rtc.h"
2019-06-30 01:55:19 +01:00
#include "../soc/bpmp.h"
#include "../soc/i2c.h"
#include "../soc/pmc.h"
2018-08-13 09:58:24 +01:00
#include "../soc/t210.h"
2018-03-07 01:11:46 +00:00
#define USE_RTC_TIMER
extern void sd_unmount();
2018-06-26 17:00:46 +01:00
u32 get_tmr_s()
2018-05-01 06:15:48 +01:00
{
2018-11-10 12:11:42 +00:00
return RTC(APBDEV_RTC_SECONDS);
}
u32 get_tmr_ms()
{
// The registers must be read with the following order:
// RTC_MILLI_SECONDS (0x10) -> RTC_SHADOW_SECONDS (0xC)
return (RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000));
2018-06-26 17:00:46 +01:00
}
u32 get_tmr_us()
{
2018-11-10 12:11:42 +00:00
return TMR(TIMERUS_CNTR_1US); //TIMERUS_CNTR_1US
2018-05-01 06:15:48 +01:00
}
void msleep(u32 ms)
{
#ifdef USE_RTC_TIMER
u32 start = RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000);
// Casting to u32 is important!
while (((u32)(RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000)) - start) <= ms)
;
#else
bpmp_msleep(ms);
#endif
}
void usleep(u32 us)
2018-03-07 01:11:46 +00:00
{
#ifdef USE_RTC_TIMER
2018-11-10 12:11:42 +00:00
u32 start = TMR(TIMERUS_CNTR_1US);
// Check if timer is at upper limits and use BPMP sleep so it doesn't wake up immediately.
if ((start + us) < start)
bpmp_usleep(us);
else
while ((u32)(TMR(TIMERUS_CNTR_1US) - start) <= us) // Casting to u32 is important!
;
#else
bpmp_usleep(us);
#endif
2018-03-07 01:11:46 +00:00
}
void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops)
{
for(u32 i = 0; i < num_ops; i++)
base[ops[i].off] = ops[i].val;
}
void panic(u32 val)
{
// Set panic code.
PMC(APBDEV_PMC_SCRATCH200) = val;
//PMC(APBDEV_PMC_CRYPTO_OP) = PMC_CRYPTO_OP_SE_DISABLE;
TMR(TIMER_WDT4_UNLOCK_PATTERN) = TIMER_MAGIC_PTRN;
TMR(TIMER_TMR9_TMR_PTV) = TIMER_EN | TIMER_PER_EN;
TMR(TIMER_WDT4_CONFIG) = TIMER_SRC(9) | TIMER_PER(1) | TIMER_PMCRESET_EN;
TMR(TIMER_WDT4_COMMAND) = TIMER_START_CNT;
2019-08-27 23:08:57 +01:00
while (true)
usleep(1);
}
void reboot_normal()
{
2019-06-30 01:55:19 +01:00
bpmp_mmu_disable();
sd_unmount();
display_end();
panic(0x21); // Bypass fuse programming in package1.
}
void reboot_rcm()
{
2019-06-30 01:55:19 +01:00
bpmp_mmu_disable();
sd_unmount();
display_end();
PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
while (true)
bpmp_halt();
}
void power_off()
{
sd_unmount();
2019-08-27 23:08:57 +01:00
display_end();
// Stop the alarm, in case we injected and powered off too fast.
max77620_rtc_stop_alarm();
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
2019-08-27 23:08:57 +01:00
while (true)
bpmp_halt();
}