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ldr/bl: manage arbiter
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985c513770
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1214ab0e02
2 changed files with 10 additions and 1 deletions
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@ -1173,6 +1173,9 @@ int hos_launch(ini_sec_t *cfg)
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = BIT(CLK_H_AHBDMA) | BIT(CLK_H_APBDMA) | BIT(CLK_H_USB2);
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// Reset arbiter.
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hw_config_arbiter(true);
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// Scale down RAM OC if enabled.
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minerva_prep_boot_freq();
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019 CTCaer
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* Copyright (c) 2019-2024 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -67,6 +67,12 @@ void loader_main()
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3.
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz).
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// Set arbiter.
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ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x12412D1;
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ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x0000000;
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ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x220244A;
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ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320369B;
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// Get Payload size.
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u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size.
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payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add compiler alignment.
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