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hekate/bdk/mem
CTCaer fb31cb2926 bdk: ccplex: add no rst vector lock & powergating
Allow not locking the reset vectors and launch a new payload after powergating ccplex.
2024-03-13 01:37:52 +02:00
..
emc.h sdram: acquire per chip mrr info 2024-02-12 04:08:39 +02:00
heap.c
heap.h
mc.c bdk: mc: remove some redundant carveout cfg 2024-01-07 12:33:29 +02:00
mc.h
mc_t210.h
minerva.c bdk: sdram: adjust sdmmc1 la for l4t 2024-02-21 10:50:15 +02:00
minerva.h bdk: minerva: add custom option in table 2024-02-16 15:51:02 +02:00
mtc_table.h bdk: minerva: add custom option in table 2024-02-16 15:51:02 +02:00
sdram.c sdram: acquire per chip mrr info 2024-02-12 04:08:39 +02:00
sdram.h bdk: dram: add FPGA code for 3rd gen micron 2024-02-16 15:54:22 +02:00
sdram_config.inl bdk: dram: add FPGA code for 3rd gen micron 2024-02-16 15:54:22 +02:00
sdram_config_t210b01.inl
sdram_param_t210.h
sdram_param_t210b01.h
smmu.c bdk: ccplex: add no rst vector lock & powergating 2024-03-13 01:37:52 +02:00
smmu.h bdk: various functionality independent changes 2022-01-16 01:03:24 +02:00