2018-09-07 16:00:13 +01:00
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/*
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2019-04-08 03:00:49 +01:00
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* Copyright (c) 2018-2019 Atmosphère-NX
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2018-09-07 16:00:13 +01:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2018-02-18 02:50:39 +00:00
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#ifndef EXOSPHERE_PMC_H
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#define EXOSPHERE_PMC_H
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#include <stdint.h>
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2018-02-24 16:13:42 +00:00
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#include "memory_map.h"
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2018-02-18 02:50:39 +00:00
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/* Exosphere register definitions for the Tegra X1 PMC. */
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2018-02-26 21:09:35 +00:00
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static inline uintptr_t get_pmc_base(void) {
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return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_RTC_PMC) + 0x400ull;
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}
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#define PMC_BASE (get_pmc_base())
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2018-02-18 02:50:39 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_DPD_ENABLE_0 MAKE_REG32(PMC_BASE + 0x24)
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2018-02-26 10:00:02 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_PWRGATE_TOGGLE_0 MAKE_REG32(PMC_BASE + 0x30)
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#define APBDEV_PMC_PWRGATE_STATUS_0 MAKE_REG32(PMC_BASE + 0x38)
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2018-02-18 02:50:39 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_SCRATCH0_0 MAKE_REG32(PMC_BASE + 0x50)
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2018-02-26 10:00:02 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_CRYPTO_OP_0 MAKE_REG32(PMC_BASE + 0xF4)
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2018-02-28 03:43:07 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PM_0 MAKE_REG32(PMC_BASE + 0x14)
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#define APBDEV_PMC_WAKE2_STATUS_0 MAKE_REG32(PMC_BASE + 0x168)
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#define APBDEV_PMC_CNTRL2_0 MAKE_REG32(PMC_BASE + 0x440)
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2018-02-26 10:00:02 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_SCRATCH43_0 MAKE_REG32(PMC_BASE + 0x22C)
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#define APBDEV_PMC_SEC_DISABLE8_0 MAKE_REG32(PMC_BASE + 0x5C0)
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#define APBDEV_PMC_SECURE_SCRATCH112_0 MAKE_REG32(PMC_BASE + 0xB18)
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#define APBDEV_PMC_SECURE_SCRATCH113_0 MAKE_REG32(PMC_BASE + 0xB1C)
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#define APBDEV_PMC_SECURE_SCRATCH114_0 MAKE_REG32(PMC_BASE + 0xB20)
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#define APBDEV_PMC_SECURE_SCRATCH115_0 MAKE_REG32(PMC_BASE + 0xB24)
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2018-02-28 01:07:30 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_SCRATCH200_0 MAKE_REG32(PMC_BASE + 0x840)
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2018-02-28 03:43:07 +00:00
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2018-03-03 19:23:13 +00:00
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#define APBDEV_PMC_SEC_DISABLE3_0 MAKE_REG32(PMC_BASE + 0x2D8)
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#define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_REG32(PMC_BASE + 0x368)
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#define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_REG32(PMC_BASE + 0x36C)
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2018-03-02 21:44:21 +00:00
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2018-03-25 22:05:08 +01:00
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#define APBDEV_PMC_SECURE_SCRATCH16_0 MAKE_REG32(PMC_BASE + 0x320)
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#define APBDEV_PMC_SECURE_SCRATCH51_0 MAKE_REG32(PMC_BASE + 0x3AC)
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#define APBDEV_PMC_SECURE_SCRATCH55_0 MAKE_REG32(PMC_BASE + 0x3BC)
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#define APBDEV_PMC_SECURE_SCRATCH74_0 MAKE_REG32(PMC_BASE + 0x408)
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#define APBDEV_PMC_SECURE_SCRATCH75_0 MAKE_REG32(PMC_BASE + 0x40C)
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#define APBDEV_PMC_SECURE_SCRATCH76_0 MAKE_REG32(PMC_BASE + 0x410)
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#define APBDEV_PMC_SECURE_SCRATCH77_0 MAKE_REG32(PMC_BASE + 0x414)
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#define APBDEV_PMC_SECURE_SCRATCH78_0 MAKE_REG32(PMC_BASE + 0x418)
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#define APBDEV_PMC_SECURE_SCRATCH99_0 MAKE_REG32(PMC_BASE + 0xAE4)
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#define APBDEV_PMC_SECURE_SCRATCH100_0 MAKE_REG32(PMC_BASE + 0xAE8)
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#define APBDEV_PMC_SECURE_SCRATCH101_0 MAKE_REG32(PMC_BASE + 0xAEC)
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#define APBDEV_PMC_SECURE_SCRATCH102_0 MAKE_REG32(PMC_BASE + 0xAF0)
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#define APBDEV_PMC_SECURE_SCRATCH103_0 MAKE_REG32(PMC_BASE + 0xAF4)
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#define APBDEV_PMC_SECURE_SCRATCH39_0 MAKE_REG32(PMC_BASE + 0x37C)
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2018-03-02 21:44:21 +00:00
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2018-02-28 01:07:30 +00:00
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2018-02-24 16:13:42 +00:00
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#endif
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